Datasheet

ps L
Adc = gm R´
s
1+
2 × z
vo
= Adc
vc
s
1+
2 × p
æ ö
ç ÷
p ¦
è ø
´
æ ö
ç ÷
p ¦
è ø
VO
R
L
VC
fp
fz
Adc
gm
ps
R
ESR
C
OUT
VSENSE
COMP
VO
R1
R3
C1
C2
R2
CO RO
gm
250 µA/V
Power Stage
19 A/V
PH
R
ESR
C
OUT
R
L
b
a
c
0.6 V
TPS54519
www.ti.com SLVSAT3A –SEPTEMBER 2011–REVISED DECEMBER 2013
Figure 24. Small Signal Model for Loop Response
SIMPLE SMALL SIGNAL MODEL FOR PEAK CURRENT MODE CONTROL
Figure 24 is a simple small signal model that can be used to understand how to design the frequency
compensation. The TPS54519 power stage can be approximated to a voltage controlled current source (duty
cycle modulator) supplying current to the output capacitor and load resistor. The control to output transfer
function is shown in Equation 11 and consists of a dc gain, one dominant pole and one ESR zero. The quotient
of the change in switch current and the change in COMP pin voltage (node c in Figure 24) is the power stage
transconductance. The gm for the TPS54519 is 19 A/V. The low frequency gain of the power stage frequency
response is the product of the transconductance and the load resistance as shown in Equation 12. As the load
current increases and decreases, the low frequency gain decreases and increases, respectively. This variation
with load may seem problematic at first glance, but the dominant pole moves with load current [see Equation 13].
The combined effect is highlighted by the dashed line in the right half of Figure 25. As the load current
decreases, the gain increases and the pole frequency lowers, keeping the 0-dB crossover frequency the same
for the varying load conditions which makes it easier to design the frequency compensation.
Figure 25. Simple Small Signal Model and Frequency Response for Peak Current Mode Control
(11)
(12)
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