Datasheet

0.89
Fsw(kHz) 24517 RT(k )
-
= ´ W
1.121
SW
RT (k ) = 84145 F (kHz)
-
W ´
SS/TR1
TPS54519
EN1
PWRGD1
SS/TR2
TPS54519
EN2
PWRGD2
VOUT1
VOUT 2
R1
R2
EN1
Vout2
SS2
Vout1
TPS54519
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SLVSAT3A SEPTEMBER 2011REVISED DECEMBER 2013
Figure 22. Schematic for Ratio-metric Start-Up Figure 23. Ratio-metric Start-Up using Coupled
Sequence SS/TR Pins
CONSTANT SWITCHING FREQUENCY and TIMING RESISTOR (RT Pin)
The switching frequency of the TPS54519 is adjustable over a wide range from 200 kHz to 2000 kHz by placing
a maximum of 218 k and minimum of 16.9 k, respectively, on the RT pin. An internal amplifier holds this pin
at a fixed voltage when using an external resistor to ground to set the switching frequency. The RT is typically
0.5 V. To determine the timing resistance for a given switching frequency, use the curve in Figure 8 and
Figure 9, or Equation 9.
spacer
(9)
spacer
(10)
To reduce the solution size one would typically set the switching frequency as high as possible, but tradeoffs of
the efficiency, maximum input voltage and minimum controllable on time should be considered.
The minimum controllable on time is typically 60 ns at full current load and 100 ns at no load, and limits the
maximum operating input voltage or output voltage.
OVERCURRENT PROTECTION
The TPS54519 implements a cycle by cycle current limit. During each switching cycle the high side switch
current is compared to the voltage on the COMP pin. When the instantaneous switch current intersects the
COMP voltage, the high side switch is turned off. During overcurrent conditions that pull the output voltage low,
the error amplifier responds by driving the COMP pin high, increasing the switch current. The error amplifier
output is clamped internally. This clamp functions as a switch current limit.
FREQUENCY SHIFT
To operate at high switching frequencies and provide protection during overcurrent conditions, the TPS54519
implements a frequency shift. If frequency shift was not implemented, during an overcurrent condition the low
side MOSFET may not be turned off long enough to reduce the current in the inductor, causing a current
runaway. With frequency shift, during an overcurrent condition the switching frequency is reduced from 100%,
then 50%, then 25% as the voltage decreases from 0.6 to 0 volts on VSENSE pin to allow the low side MOSFET
to be off long enough to decrease the current in the inductor. During start-up, the switching frequency increases
as the voltage on VSENSE increases from 0 to 0.6 volts. See Figure 7 for details.
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