Datasheet

VO
R
L
VC
fp
fz
Adc
gm
ps
R
ESR
C
OUT
s
1+
2 × z
vo
= Adc
vc
s
1+
2 × p
æ ö
ç ÷
p ¦
è ø
´
æ ö
ç ÷
p ¦
è ø
ps L
Adc = gm R´
¦
´ ´ p
OUT L
1
p =
C R 2
¦
´ ´ p
OUT ESR
1
z =
C R 2
TPS54478
SLVSAS2 – JUNE 2011 www.ti.com
SIMPLE SMALL SIGNAL MODEL FOR PEAK CURRENT MODE CONTROL
Figure 31 is a simple small signal model that can be used to understand how to design the frequency
compensation without slope compensation effect. The TPS54478 power stage can be approximated to a voltage
controlled current source (duty cycle modulator) supplying current to the output capacitor and load resistor. The
control to output transfer function is shown in Equation 9 and consists of a dc gain, one dominant pole and one
ESR zero. The quotient of the change in switch current and the change in COMP pin voltage (node c in
Figure 31) is the power stage transconductance. The gm for the TPS54478 is 14 A/V. The low frequency gain of
the power stage frequency response is the product of the transconductance and the load resistance as shown in
Equation 10. As the load current increases and decreases, the low frequency gain decreases and increases,
respectively. This variation with load may seem problematic at first glance, but the dominant pole moves with
load current [see Equation 11]. The combined effect is highlighted by the dashed line in the right half of
Figure 32. As the load current decreases, the gain increases and the pole frequency lowers, keeping the 0-dB
crossover frequency the same for the varying load conditions which makes it easier to design the frequency
compensation.
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Figure 32. Simple Small Signal Model and Frequency Response for Peak Current Mode Control without
Slope Comp Effect
(9)
(10)
(11)
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(12)
SMALL SIGNAL MODEL FOR FREQUENCY COMPENSATION
The TPS54478 uses a transconductance amplifier for the error amplifier and readily supports two of the
commonly used frequency compensation circuits. The compensation circuits are shown in Figure 33. The Type 2
circuits are most likely implemented in high bandwidth power supply designs using low ESR output capacitors. In
Type 2A, one additional high frequency pole is added to attenuate high frequency noise.
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