Datasheet

Css(nF) = 3 Tss(mS)´
SS2
TPS54478
EN2
PWRGD2
SS1
EN1
PWRGD1
Vo2
PWRGD1
Vo1
EN1
t = 1ms/div
EN1
VO1
PWRGD1
VO2
t - Time = 1 ms/div
TPS54478
www.ti.com SLVSAS2 –JUNE 2011
SLOW START / TRACKING PIN
The TPS54478 regulates to the lower of the SS/TR pin and the internal reference voltage. A capacitor on the
SS/TR pin to ground implements a slow start time. Before the SS pin reaches the voltage threshold V
SSTHR
, the
charge current is about 45 μA. The TPS54478 internal pull-up current source of 2.2 μA charges the external slow
start capacitor after the SS pin voltage exceeds V
SSTHR
. Equation 4 calculates the required slow start capacitor
value where Tss is the desired slow start time in ms and Css is the required capacitance in nF.
vertical spacer
(4)
If during normal operation, the VIN goes below the UVLO, EN pin pulled below 1.21 V, or a thermal shutdown
event occurs, the TPS54478 stops switching. When the VIN goes above UVLO, EN is released or pulled high, or
a thermal shutdown is exited, then SS/TR is discharged to below 65 mV before reinitiating a powering up
sequence. The VSENSE voltage will follow the SS/TR pin voltage with a 65mV offset up to 90% of the internal
voltage reference. When the SS/TR voltage is greater than 90% of the internal reference voltage the offset
increases as the effective system reference transitions from the SS/TR voltage to the internal voltage reference.
SEQUENCING
Many of the common power supply sequencing methods can be implemented using the SS/TR, EN and PWRGD
pins. The sequential method can be implemented using an open drain or collector output of a power on reset pin
of another device. Figure 23 shows the sequential method. The PWRGD is coupled to the EN pin on the
TPS54478 which enables the second power supply once the primary supply reaches regulation.
Ratio-metric start up can be accomplished by connecting the SS/TR pins together. The regulator outputs ramp
up and reach regulation at the same time. When calculating the slow start time the pull up current source must
be doubled in Equation 4. The ratio metric method is illustrated in Figure 25.
Figure 23. Sequential Start-Up Sequence Figure 24. Sequential Startup using EN and
PWRGD
Copyright © 2011, Texas Instruments Incorporated 13