Datasheet

V = 500 mV / div
OUT
Time = 2 msec / div
EN = 5 V / div
Pre-bias voltage = 500 mV
V = 2 V / div
OUT
Time = 2 msec / div
EN = 5 V / div
V = 5 V / div
IN
PWRGD = 5 V / div
Test Setup and Results www.ti.com
The TPS54478 is designed to start up into pre-biased outputs. Figure 11 shows the output voltage start up
waveform when the output is pre-biased with 500 mV.
Figure 11. TPS54478EVM-037 Start-up into Pre-bias
2.10 Powering Down
Figure 12 and Figure 13 show the start-up waveforms for the TPS54478EVM-037. In Figure 12, the output
voltage ramps down as soon as the input voltage falls below the UVLO stop threshold as set by the R1
and R2 resistor divider network. In Figure 13, the output is inhibited by using a jumper at JP1 to tie EN to
GND. The input voltage for these plots is 5 V and the load is 1Ω.
Figure 12. TPS54478EVM-037 Shut-down Relative to V
IN
10
TPS54478EVM-037 4-A, SWIFT™ Regulator Evaluation Module SLVU470–June 11
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