Datasheet

P
OUT OUT
1
F =
2 L C´p
OUT
R1
V = 0.765 1+
R2
æ ö
´
ç ÷
è ø
4.5 to 18 V
1.05 V 4 A
8200 pF
TPS54428DDA
Δ
1
TPS54428
SLVSB42B NOVEMBER 2011REVISED MARCH 2013
www.ti.com
DESIGN GUIDE
Step By Step Design Procedure
To begin the design process, you must know a few application parameters:
Input voltage range
Output voltage
Output current
Output voltage ripple
Input voltage ripple
Figure 15. Schematic Diagram for This Design Example.
Output Voltage Resistors Selection
The output voltage is set with a resistor divider from the output node to the VFB pin. It is recommended to use
1% tolerance or better divider resistors. Start by using Equation 3 to calculate V
OUT
.
To improve efficiency at very light loads consider using larger value resistors, too high of resistance will be more
susceptible to noise and voltage errors from the VFB input current will be more noticeable.
(3)
Output Filter Selection
The output filter used with the TPS54428 is an LC circuit. This LC filter has double pole at:
(4)
At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal
gain of the TPS54428. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls
off at a 40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high frequency zero that
reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the
zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole
of is located below the high frequency zero but close enough that the phase boost provided be the high
frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the values
recommended in Table 1.
10 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links :TPS54428