Datasheet

VFB
VREG5
SS
GND
EN VIN
VBST
SW
EXPOSED
THERMAL PAD
AREA
BOOST
CAPACITOR
VOUT
VIA to Ground Plane
OUTPUT
INDUCTOR
OUTPUT
FILTER
CAPACITOR
SLOW
START
CAP
ANALOG
GROUND
TRACE
VIN
INPUT
BYPASS
CAPACITOR
VIN
FEEDBACK
RESISTORS
TO ENABLE
CONTROL
POWER GROUND
BIAS
CAP
Connection to
POWER GROUND
on internal or
bottom layer
VIN
HIGH FREQENCY
BYPASS
CAPACITOR
VIN
SW
TPS54427
www.ti.com SLVSB43A –NOVEMBER 2011–REVISED JUNE 2013
Figure 17. PCB Layout for the DRC Package
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REVISION HISTORY
Changes from Original (November 2011) to Revision A Page
• Added "and 10-pin DRC" to the DESCRIPTION .................................................................................................................. 1
• Added the DRC-10 pin Package to the ORDERING INFORMATION table ......................................................................... 2
• Changed the VBST(vs SW) MAX value From: 5.7V to 6V in the ROC table ....................................................................... 3
• Changed V
FB
input current MAX value From: ±0.15 µA To: ±0.1 µA ................................................................................... 3
• Added High side switch resistance (DRC) ............................................................................................................................ 3
• Changed Figure 11 ............................................................................................................................................................... 9
• Added Figure 13 ................................................................................................................................................................. 10
• Added Figure 17 ................................................................................................................................................................. 15
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