Datasheet
TPS54426
SLVSAD6C – AUGUST 2010–REVISED JULY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
T
A
PACKAGE
(2) (3)
ORDERABLE PART NUMBER PIN TRANSPORT MEDIA
TPS54426PWP Tube
PowerPAD™
14
(HTSSOP) – PWP
TPS54426PWPR Tape and Reel
–45°C to 85°C
TPS54426RSAT Tape and Reel
Plastic Quad Flat Pack (QFN) 16
TPS54426RSAR Tape and Reel
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) All package options have Cu NIPDAU lead/ball finish.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE UNIT
V
IN1
, V
IN2
, EN –0.3 to 20 V
V
BST
–0.3 to 26 V
V
BST
(10 ns transient) –0.3 to 28 V
V
I
Input voltage range
V
FB
, V
O
, SS, PG –0.3 to 6.5 V
SW1, SW2 –2 to 20 V
SW1, SW2 (10 ns transient) –3 to 22 V
V
REG5
–0.3 to 6.5 V
V
O
Output voltage range
P
GND1
, P
GND2
–0.3 to 0.3 V
V
diff
Voltage from GND to POWERPAD –0.2 to 0.2 V
Human Body Model (HBM) 2 kV
Electrostatic
ESD rating
discharge
Charged Device Model (CDM) 500 V
T
J
Operating junction temperature –40 to 150 °C
T
stg
Storage temperature –55 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TPS54426
THERMAL METRIC
(1)
UNITS
PWP (14) PINS RSA (16) PINS
θ
JA
Junction-to-ambient thermal resistance 55.6 37.3
θ
JCtop
Junction-to-case (top) thermal resistance 51.3 42.5
θ
JB
Junction-to-board thermal resistance 36.4 14.9
°C/W
ψ
JT
Junction-to-top characterization parameter 1.8 0.8
ψ
JB
Junction-to-board characterization parameter 20.6 14.8
θ
JCbot
Junction-to-case (bottom) thermal resistance 4.3 4.9
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2 Copyright © 2010–2011, Texas Instruments Incorporated
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