Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder HTSSOP 14

Vout (50 mV/div)

Iout (2 A/div)

100 s/divm

TPS54426

www.ti.com

SLVSAD6C –AUGUST 2010– REVISED JULY 2011

4.5V to 18V Input, 4-A Synchronous Step-Down SWIFT™ Converter with Eco-Mode™

Check for Samples: TPS54426

FEATURES

DESCRIPTION

The TPS54426 is an adaptive on-time D-CAP2™

• D-CAP2™ Mode Enables Fast Transient

mode synchronous buck converter. The TPS54426

Response

enables system designers to complete the suite of

• Low Output Ripple and Allows Ceramic Output

various end equipment’s power bus regulators with a

Capacitor

cost effective, low component count, low standby

current solution. The main control loop for the

• Wide V

Input Voltage Range: 4.5 V to 18 V

TPS54426 uses the D-CAP2™ mode control which

• Output Voltage Range: 0.76 V to 5.5 V

provides a very fast transient response with no

• Highly Efficient Integrated FET’s Optimized

external compensation components. The adaptive

for Lower Duty Cycle Applications

on-time control supports seamless transition between

– 65 mΩ (High Side) and 55 mΩ (Low Side)

PWM mode at higher load conditions and

Eco-mode™ operation at light loads. Eco-mode™

• High Efficiency, less than 10 μA at shutdown

allows the TPS54426 to maintain high efficiency

• High Initial Bandgap Reference Accuracy

during lighter load conditions. The TPS54426 also

• Adjustable Soft Start

has a proprietary circuit that enables the device to

adopt to both low equivalent series resistance (ESR)

• Pre-Biased Soft Start

output capacitors, such as POSCAP, SP-CAP, and

• 700-kHz Switching Frequency (f

)

ultra-low ESR ceramic capacitors. The device

• Cycle By Cycle Over Current Limit

operates from 4.5-V to 18-V VIN input. The output

voltage can be programmed between 0.76 V and 5.5

• Power Good Output

V. The device also features an adjustable soft start

• Auto-Skip Eco-mode™ for High Efficiency at

time and a power good function. The TPS54426 is

Light Load

available in the 14-pin HTSSOP package and the 16

pin QFN package, designed to operate from –40°C to

APPLICATIONS

85°C.

• Wide Range of Applications for Low Voltage

System

– Digital TV Power Supply

– High Definition Blu-ray Disc™ Players

– Networking Home Terminal

– Digital Set Top Box (STB)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2D-CAP2, Eco-mode, PowerPAD are trademarks of Texas Instruments.

3Blu-ray Disc is a trademark of Blu-ray Disc Association.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (28 pages)

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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com 4.5V to 18V Input, 4-A Synchronous Step-Down SWIFT™ Converter with Eco-Mode™ Check for Samples: TPS54426 FEATURES DESCRIPTION • The TPS54426 is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54426 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) VIN Supply input voltage range VI Input voltage range MIN MAX 4.5 18 VBST –0.3 24 VBST (10 ns transient) –0.3 27 SS, PG –0.1 5.7 EN –0.1 18 VO, VFB –0.1 5.5 SW1, SW2 –1.8 18 UNIT V V –3 21 PGND1, PGND2 –0.1 0.1 –0.1 5.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range, VIN = 12V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 4.7 5.4 7.5 UNIT CURRENT LIMIT Iocl Current limit LOUT = 1.5 μH (2), TA = -20 ºC to 85 ºC A THERMAL SHUTDOWN TSDN Thermal shutdown threshold Shutdown temperature Hysteresis (2) 165 (2) °C 30 ON-TIME TIMER CONTROL TON On time VIN = 12 V, VO = 1.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com FUNCTIONAL BLOCK DIAGRAM -35% UV 14 OV 13 1 VO VIN2 VIN VIN1 +20% VREG5 12 Control logic VBST Ref SS 1 shot SW VFB SGND 10 XCON VREG5 VREG5 Ceramic Capacitor 3 SS 1mF VO 11 2 9 4 8 SW Softstart SS PGND 5 PGND ZC PGND GND SW OCP SGND PG PGND Ref VCC 6 -10% UV VREG5 EN 7 A. EN Logic OV UVLO UVLO Protection Logic TSD REF Ref The block diagram shown is for the PWP 14 pin package.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com OVERVIEW The TPS54426 is a 4-A synchronous step-down (buck) converter with two integrated N-channel MOSFETs and auto-skip Eco-mode™ to improve light lode efficiency. It operates using D-CAP2™ mode control. The fast transient response of D-CAP2™ control reduces the output capacitance required to meet a specific level of performance.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com Power Good The TPS54426 has power-good open drain output. The power good function is activated after soft start has finished. The power good function becomes active after 1.7 times soft-start time. When the output voltage is within -10% of the target value, internal comparators detect power good state and the power good signal becomes high. Rpg resister value ,which is connected between PG and VREG5, is required from 20kΩ to 150kΩ.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com Thermal Shutdown TPS54426 monitors the temperature of itself. If the temperature exceeds the threshold value (typically 165°C), the device is shut off. This is non-latch protection.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 1.05V OUTPUT VOLTAGE vs INPUT VOLTAGE 1.05V 50mA to 4A LOAD TRANSIENT RESPONSE 1.1 Vout (50 mV/div) VO - Output Voltage -V 1.075 IO = 10 mA IO = 1 A 1.05 Iout (2 A/div) 1.025 1 0 5 10 VI - Input Voltage - V 15 20 100 ms/div Figure 5. Figure 6. STARTUP WAVEFORM EFFICIENCY vs OUTPUT CURRENT 100 VO = 3.3 V 90 EN - 10 V/div VOUT - 0.5 V/div Efficiency - % 80 VO = 1.8 V VO = 2.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) LIGHT LOAD EFFICIENCY vs OUTPUT CURRENT SWITCHING FREQUENCY vs INPUT VOLTAGE (IO=1A) 100 800 VO = 3.3 V VO = 2.5 V fsw - Switching Frequency - kHz Efficiency - % 80 VO = 1.8 V 60 40 20 0 0.001 0.01 IO - Output Current - A VO = 1.8 V 700 600 VO = 3.3 V 500 400 0.1 0 5 10 VI - Input Voltage - V 15 Figure 9. Figure 10.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com DESIGN GUIDE Step By Step Design Procedure To • • • • • begin the design process, you must know a few application parameters: Input voltage range Output voltage Output current Output voltage ripple Input voltage ripple Figure 14. Schematic Diagram for This Design Example Output Voltage Resistors Selection The output voltage is set with a resistor divider from the output node to the VFB pin.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54426. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a -40 dB per decade rate and the phase drops rapidly.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com Bootstrap Capacitor Selection A 0.1 μF ceramic capacitor must be connected between the VBST to SW pin for proper operation. It is recommended to use a ceramic capacitor. VREG5 Capacitor Selection A 1.0 μF ceramic capacitor must be connected between the VREG5 to GND pin for proper operation. It is recommended to use a ceramic capacitor.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com LAYOUT CONSIDERATIONS 1. Keep the input switching current loop as small as possible. 2. Keep the SW node as physically small and short as possible to minimize parasitic capacitance and inductance and to minimize radiated emissions. Kelvin connections should be brought from the output to the feedback pin of the device. 3. Keep analog and non-switching components away from switching components. 4.
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TPS54426 SLVSAD6C – AUGUST 2010 – REVISED JULY 2011 www.ti.com REVISION HISTORY Changes from Revision # (August 2010) to Revision A • Page Added VIN = 12V to condition in Electrical Characteristics table .......................................................................................... 3 Changes from Revision A (November 2010) to Revision B Page • Added the RSA (16 pin QFN package) to: DESCRIPTION, ORDERING INFORMATION, THERMAL INFORMATION, and DEVICE INFORMATION sections ...................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) TPS54426PWPR HTSSOP PWP 14 2000 330.0 12.4 TPS54426RSAR QFN RSA 16 3000 330.0 TPS54426RSAT QFN RSA 16 250 180.0 6.9 5.6 1.6 8.0 12.0 Q1 12.4 4.25 4.25 1.15 8.0 12.0 Q2 12.4 4.25 4.25 1.15 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS54426PWPR HTSSOP PWP 14 2000 367.0 367.0 35.0 TPS54426RSAR QFN RSA 16 3000 367.0 367.0 35.0 TPS54426RSAT QFN RSA 16 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.