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User's Guide

SLVU381–August 2010

TPS54426EVM-608 4-A, SWIFT™ Regulator Evaluation

Module

Contents

1 Introduction .................................................................................................................. 2

1.1 Background ......................................................................................................... 2

1.2 Performance Specification Summary ............................................................................ 2

1.3 Modifications ........................................................................................................ 3

2 Test Setup and Results .................................................................................................... 3

2.1 Input / Output Connections ....................................................................................... 3

2.2 Start Up Procedure ................................................................................................ 4

2.3 Efficiency ............................................................................................................ 4

2.4 Light Load Efficiency .............................................................................................. 5

2.5 Load Regulation .................................................................................................... 6

2.6 Line Regulation ..................................................................................................... 7

2.7 Load Transient Response ........................................................................................ 8

2.8 Output Voltage Ripple ............................................................................................. 8

2.9 Input Voltage Ripple ............................................................................................... 9

2.10 Start Up .............................................................................................................. 9

3 Board Layout ............................................................................................................... 10

3.1 Layout .............................................................................................................. 10

4 Schematic, Bill of Materials and Reference ............................................................................ 14

4.1 Schematic ......................................................................................................... 14

4.2 Bill of Materials .................................................................................................... 14

4.3 Reference .......................................................................................................... 14

List of Figures

1 TPS54426EVM-608 Efficiency ............................................................................................ 4

2 TPS54426EVM-608 Light Load Efficiency............................................................................... 5

3 TPS54426EVM-608 Load Regulation .................................................................................... 6

4 TPS54426EVM-608 Line Regulation..................................................................................... 7

5 TPS54426EVM-608 Load Transient Response......................................................................... 8

6 TPS54426EVM-608 Output Voltage Ripple ............................................................................. 8

7 TPS54426EVM-608 Input Voltage Ripple ............................................................................... 9

8 TPS54426EVM-608 Start Up.............................................................................................. 9

9 TPS54426EVM-608 Start Up Relative to Enable ..................................................................... 10

10 Top Assembly.............................................................................................................. 11

11 Top Layer................................................................................................................... 11

12 Internal Layer 1 ............................................................................................................ 12

13 Internal Layer 2 ............................................................................................................ 12

14 Bottom Layer as Seen from Back Side................................................................................. 13

15 Bottom Assembly as Seen from Back Side ........................................................................... 13

16 TPS54426EVM-608 Schematic Diagram............................................................................... 14

SWIFT, D-CAP2, Eco-mode are trademarks of Texas Instruments.

SLVU381–August 2010 TPS54426EVM-608 4-A, SWIFT™ Regulator Evaluation Module

Summary of content (16 pages)

PAGE 1
User's Guide SLVU381 – August 2010 TPS54426EVM-608 4-A, SWIFT™ Regulator Evaluation Module 1 2 3 4 Contents Introduction .................................................................................................................. 2 1.1 Background ......................................................................................................... 2 1.2 Performance Specification Summary ............................................................................ 2 1.3 Modifications ...........
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Introduction www.ti.com List of Tables 1 1 Input Voltage and Output Current Summary ............................................................................ 2 2 TPS54426 EVM and Performance Specifications Summary .......................................................... 2 3 Output Voltages ............................................................................................................. 3 4 Connection and Test Points ................................................................
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Test Setup and Results www.ti.com 1.3 Modifications These evaluation modules are designed to provide access to the feature of the TPS54426. Some modification can be made to this module. 1.3.1 Output Voltage Set Point To change the output voltage of the EVMs, it is necessary to change the value of resistor R1. Changing the value of R1 can change the output voltage above 0.765V. The value of R1 for a specific output voltage can be calculated using Equation 1 and Equation 2. For output voltage from 0.
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Test Setup and Results www.ti.com Table 4. Connection and Test Points 2.2 Reference Designator Function J1 VIN (see Table 1 for VIN range) J2 VOUT, 1.05 V at 4 A maximum JP1 EN control. Connect EN to OFF to disable, connect EN to ON to enable.
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Test Setup and Results www.ti.com 2.4 Light Load Efficiency Figure 2 shows the efficiency at light loads for the TPS54426EVM-608 at an ambient temperature of 25°C. 100 VIN = 5 V VOUT = 1.05 V 90 80 Efficiecny - % 70 VIN = 12 V 60 50 40 30 20 10 0 0.01 0.1 1 10 Output Current - A Figure 2.
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Test Setup and Results 2.5 www.ti.com Load Regulation The load regulation for the TPS54426EVM-608 is shown Figure 3. 1.2 VIN = 5 V VOUT = 1.05 V 1 Output Voltage Deviation - % 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 0 0.5 1 1.5 2 2.5 3 3.5 4 Output Current - A Figure 3.
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Test Setup and Results www.ti.com 2.6 Line Regulation The line regulation for the TPS54426EVM-608 is shown Figure 4. 0.5 IOUT = 2 A VOUT = 1.05 V Output Voltage Deviation - % 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 4.5 6 7.5 9 10.5 12 13.5 15 16.5 18 Input Voltage - V Figure 4.
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Test Setup and Results 2.7 www.ti.com Load Transient Response The TPS54426EVM-608 response to load transient is shown in Figure 5. The current step is from 500 mA to 1.5 A (25% to 75% of rated load). Total peak-to-peak output voltage variation is as shown. VOUT = 50 mV / div (ac coupled) IOUT = 1 A / div (1 A to 3 A load step) Time = 1 usec / div Figure 5. TPS54426EVM-608 Load Transient Response 2.8 Output Voltage Ripple The TPS54426EVM-608 output voltage ripple is shown in Figure 6.
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Test Setup and Results www.ti.com 2.9 Input Voltage Ripple The TPS54426EVM-608 input voltage ripple is shown in Figure 7. The output current is the rated full load of 2A. VIN = 50 mV / div (ac coupled) SW1, SW2 = 5 V / div Time = 1 usec / div Figure 7. TPS54426EVM-608 Input Voltage Ripple 2.10 Start Up The TPS54426EVM-608 start up waveform relative to VIN is shown in Figure 8. VIN = 10 V / div VOUT = 500 mV / div PG = 5 V / div Time = 1 msec / div Figure 8.
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Board Layout www.ti.com The TPS54426EVM-608 start up waveform relative to enable (EN) is shown in Figure 9. EN = 10 V / div VOUT = 500 mV / div PG = 5 V / div Time = 1 msec / div Figure 9. TPS54426EVM-608 Start Up Relative to Enable 3 Board Layout This section provides description of the TPS54426EVM-608, board layout, and layer illustrations. 3.1 Layout The board layout for the TPS54426EVM-608 and is shown in Figure 10 through Figure 15.
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Board Layout www.ti.com Figure 10. Top Assembly Figure 11.
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Board Layout www.ti.com Figure 12. Internal Layer 1 Figure 13.
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Board Layout www.ti.com Figure 14. Bottom Layer as Seen from Back Side Figure 15.
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Schematic, Bill of Materials and Reference 4 www.ti.com Schematic, Bill of Materials and Reference This section presents the TPS54426EVM-608 schematic, bill of materials and reference. 4.1 Schematic Figure 16 is the schematic for the TPS54426EVM. Figure 16. TPS54426EVM-608 Schematic Diagram 4.2 Bill of Materials Table 5.
PAGE 15
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.