Datasheet

1 1
Co >
Voripple
8 sw
Iripple
´
´ ¦
2 Iout
Co >
sw Vout
´ D
¦ ´ D
Iripple
ILpeak = Iout +
2
æ ö
´ -
´
ç ÷
´ ´ ¦
è ø
2
2
1 Vo (Vinmax Vo)
ILrms = Io +
12 Vinmax L1 sw
-
´
´ ¦
Vinmax Vout Vout
Iripple =
L1 Vinmax sw
-
´
´ ´ ¦
Vinmax Vout Vout
L1 =
Io Kind Vinmax sw
TPS54418
www.ti.com SLVS946C –MAY 2009–REVISED JULY 2013
For this design example, use K
IND
= 0.3 and the inductor value is calculated to be 0.96 μH. For this design, a
nearest standard value was chosen: 1.0 μH. For the output filter inductor, it is important that the RMS current
and saturation current ratings not be exceeded. The RMS and peak inductor current can be found from
Equation 20 and Equation 21.
For this design, the RMS inductor current is 4.014 A and the peak inductor current is 4.58 A. The chosen
inductor is a TOKO FDV0630-1R0M. It has a current rating of 9.1 A.
The current flowing through the inductor is the inductor ripple current plus the output current. During power up,
faults or transient load conditions, the inductor current can increase above the calculated peak inductor current
level calculated above. In transient conditions, the inductor current can increase up to the switch current limit of
the device. For this reason, the most conservative approach is to specify an inductor with a saturation current
rating equal to or greater than the switch current limit rather than the peak inductor current.
(18)
(19)
(20)
(21)
OUTPUT CAPACITOR
There are three primary considerations for selecting the value of the output capacitor. The output capacitor
determines the modulator pole, the output voltage ripple, and how the regulator responds to a large change in
load current. The output capacitance needs to be selected based on the more stringent of these three criteria.
The desired response to a large change in the load current is the first criteria. The output capacitor needs to
supply the load with current when the regulator cannot. This situation would occur if there are desired hold-up
times for the regulator where the output capacitor must hold the output voltage above a certain level for a
specified amount of time after the input power is removed. The regulator is temporarily not able to supply
sufficient output current if there is a large, fast increase in the current needs of the load such as transitioning
from no load to a full load. The regulator usually needs two or more clock cycles for the control loop to see the
change in load current and output voltage and adjust the duty cycle to react to the change. The output capacitor
must be sized to supply the extra current to the load until the control loop responds to the load change. The
output capacitance must be large enough to supply the difference in current for 2 clock cycles while only allowing
a tolerable amount of droop in the output voltage. Equation 22 shows the minimum output capacitance necessary
to accomplish this.
For this example, the transient load response is specified as a 3% change in Vout for a load step from 1A (25%
load) to 2A (50%). For this example, ΔIout = 2-1 = 1.0 A and ΔVout= 0.03 × 1.8 = 0.054 V. Using these numbers
gives a minimum capacitance of 37μF. This value does not take the ESR of the output capacitor into account in
the output voltage change. For ceramic capacitors, the ESR is usually small enough to ignore in this calculation.
Equation 23 calculates the minimum output capacitance needed to meet the output voltage ripple specification.
Where fsw is the switching frequency, Vripple is the maximum allowable output voltage ripple, and Iripple is the
inductor ripple current. In this case, the maximum output voltage ripple is 30 mV. Under this requirement,
Equation 23 yields 4.8uF.
(22)
Where ΔIout is the change in output current, Fsw is the regulators switching frequency and ΔVout is the
allowable change in the output voltage. (23)
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