Datasheet

www.ti.com
FB
OUT1 FB
V R2
R4
V V
´
=
-
(32)
FB
OUT2 FB
V R9
R7
V V
´
=
-
(33)
Compensation Capacitors
f
ESR(zero)
1
2 C ESR
=
´ p´ ´
(34)
f
f
ZERO(desired)
ESR(zero)
R4
R5
1
=
æ ö
æ ö
ç ÷
-
ç ÷
ç ÷
ç ÷
è ø
è ø
(35)
EQ
1
R R5
1 1
R2 R4
= +
æ ö
æ ö æ ö
+
ç ÷
ç ÷ ç ÷
è ø è ø
è ø
(36)
f
EQ ESR(zero)
1
C8
2 R
=
´ p´ ´
(37)
Input Capacitor Selection
TPS54383 , , TPS54386
SLUS774B – AUGUST 2007 – REVISED OCTOBER 2007
• R2 = R9 = 20 k Ω
• V
FB
= 0.80 V
• R4= 3.80 k Ω (3.83 k Ω standard value is used)
• R7= 6.40 k Ω (6.34 k Ω standard value is used)
Checking the ESR zero of the output capacitors:
• C = 100 µ F
• ESR = 400 m Ω
• ESR(zero) = 3980 Hz
Since the ESR zero of the main output capacitor is less than 20 kHz, an R-C filter is added in parallel with R4
and R7 to compensate for the electrolytic capacitors' ESR and add a zero approximately 40 kHz.
• f
ESR(zero)
= 4 kHz
• f
ESR(desired)
= 40 kHz
• R4 = 3.83 k Ω
• R5 = 424 Ω (422 Ω selected)
• R7 = 6.34 k Ω
• R8 = 702 Ω (698 Ω selected)
• R2 = R9 = 20 k Ω
• R
EQ1
= 3.63 k Ω
• R
EQ2
= 5.51 k Ω
• C8 = 10.9 nF (10 nF selected)
• C15 = 7.22 nF (6800 pF selected)
The TPS54383 datasheet recommends a minimum 10- µ F ceramic input capacitor on each PVDD pin. These
capacitor must be capable of handling the RMS ripple current of the converter. The RMS current in the input
capacitors is estimated by Equation 38 .
36 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TPS54383 TPS54386