Datasheet
Time = 2 ms/div
5 V/div1 V/div2 V/div
C1: V
IN
C2: EN
C3: V
OUT
Time = 2 ms/div
2 V/div
5 V/div
1 V/div
C2: EN
C3: V
OUT
C2
C3
C1
C1: V
IN
Time = 2 ms/div
2 V/div
5 V/div
2 V/div
C1: V
IN
C2: EN
C3: V
OUT
C2
C3
C1
Test Setup and Results
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2.8 Start Up
The start up waveforms are shown in Figure 15, Figure 16 and Figure 17. The input voltage for these plots
is 12 V with a 1.4-Ω resistive load. In Figure 15 the top trace shows V
IN
, the middle trace shows EN, and
the bottom trace shows V
OUT
. The input voltage is initially applied, and when the input reaches the
undervoltage lockout threshold, the start up sequence begins and the output ramps up toward the set
value of 5.0 V.
In Figure 16 the input voltage is initially applied with EN held low. When EN is released, the start up
sequence begins and the output ramps up toward the set value of 5.0 V.
In Figure 17 the input voltage is initially applied with EN held low. An external voltage of 3.3 V is supplied
to V
OUT
. When EN is released, the start up sequence begins and the internal reference ramps up from 0 V
with the internal soft-start. When the internal reference reaches the FB voltage the output begins ramping
toward the set value of 5.0 V.
Figure 15. Start Up Relative to V
IN
Figure 16. Start Up Relative to EN
Figure 17. Prebias Start Up Relative to EN
10
Using the TPS54360 Step-Down Converter Evaluation Module SLVU769B–September 2012–Revised September 2012
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