Datasheet

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SLVS519A − MAY 2004 − REVISED OCTOBER 2004

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Switching Frequency Limitations

Due to the internal design of the TPS54352−6 there are

limitations to the maximum usable switching frequency for

any given input voltage. This limit is constrained by the

minimum controllable on time which may be as high as

220 ns. Figure 31 shows the maximum switching

frequency versus input voltage for each device. This family

of curves is valid for output currents greater than 0.5 A. As

output currents decrease towards no load (0 A), the

apparent on time increases, decreasing the maximum

switching frequency that may be obtained for a given input

and output voltage. Figure 32 shows the maximum

switching frequency versus input voltage for each device

for zero load current various operating frequencies.