Datasheet

Time = 2 ms/div
5 V/div2 V/div1 V/div
C1: V
IN
C2: EN
C3: V
OUT
Time = 2 ms/div
2 V/div
5 V/div
2 V/div
C3: EN
C2: V
OUT
C3
C2
C1
C1: V
IN
Time = 2 ms/div
2 V/div
5 V/div
2 V/div
C1: V
IN
C3: EN
C2: V
OUT
C2
C3
C1
Test Setup and Results www.ti.com
2.8 Start Up
The start up waveforms are shown in Figure 16, Figure 17, and Figure 18. The input voltage for these
plots is 12 V with a 3.5-A resistive load. In Figure 16 the top trace shows V
IN
, the middle trace shows EN,
and the bottom trace shows V
OUT
. The input voltage is initially applied, and when the input reaches the
undervoltage lockout threshold, the start up sequence begins and the output ramps up toward the set
value of 3.3 V.
In Figure 17 the input voltage is initially applied with EN held low. When EN is released, the start up
sequence begins and the output ramps up toward the set value of 3.3 V.
In Figure 18 the input voltage is initially applied with EN held low. An external voltage of 1.8 V is supplied
to V
OUT
. When EN is released, the start up sequence begins and the internal reference ramps up from 0 V
with the internal soft-start. When the internal reference reaches the FB voltage the output begins ramping
toward the set value of 3.3 V.
Figure 16. Start Up Relative to V
IN
Figure 17. Start Up Relative to EN
Figure 18. Prebias Start Up Relative to EN
10
Using the TPS54340 Step-Down Converter Evaluation Module SLVU794A–October 2012–Revised February 2013
Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated