Datasheet

1.008
101756
sw (kHz) =
RT (k )
f
W
0.991
92417
RT (k ) =
sw (kHz)f
W
f
=
SS
SW
1024
t (ms)
(kHz)
=
-
+
ENA
UVLO2
START ENA
1
UVLO1
V
R
V V
I
R
-
=
START STOP
UVLO1
HYS
V V
R
I
TPS54340
i
VIN
R
UVLO1
R
UVLO2
EN
Optional
V
EN
ihys1
TPS54340
SLVSBK0B –OCTOBER 2012–REVISED MARCH 2014 www.ti.com
Feature Description (continued)
Figure 24. Adjustable Undervoltage Lockout (UVLO)
(2)
(3)
8.3.8 Internal Soft-Start
The TPS54340 has an internal digital soft-start that ramps the reference voltage from zero volts to its final value
in 1024 switching cycles. The internal soft-start time (10% to 90%) is calculated using Equation 4.
(4)
If the EN terminal is pulled below the stop threshold of 1.2 V, switching stops and the internal soft-start resets.
The soft-start also resets in thermal shutdown.
8.3.9 Constant Switching Frequency and Timing Resistor (RT/CLK) Terminal)
The switching frequency of the TPS54340 is adjustable over a wide range from 100 kHz to 2500 kHz by placing
a resistor between the RT/CLK terminal and GND terminal. The RT/CLK terminal voltage is typically 0.5 V and
must have a resistor to ground to set the switching frequency. To determine the timing resistance for a given
switching frequency, use Equation 5 or Equation 6 or the curves in Figure 6 and Figure 7. To reduce the solution
size one would typically set the switching frequency as high as possible, but tradeoffs of the conversion
efficiency, maximum input voltage and minimum controllable on time should be considered. The minimum
controllable on time is typically 135 ns which limits the maximum operating frequency in applications with high
input to output step down ratios. The maximum switching frequency is also limited by the frequency foldback
circuit. A more detailed discussion of the maximum switching frequency is provided in the next section.
(5)
(6)
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