Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder SO 8

100

0 0.5 1 1.5 2 2.5 3 3.5

I -OutputCurrent- A

Efficiency-%

V =2.5V

V =5V

V =12V

V =15V

VIN

GND

BOOT

VSENSE

COMP

VIN

VOUT

TPS54332

BOOT

Ren1

Ren2

TPS54332

www.ti.com

SLVS875B –JANUARY 2009–REVISED FEBRUARY 2012

3.5A, 28V, 1MHz, STEP DOWN DC/DC CONVERTER WITH Eco-mode™

Check for Samples: TPS54332

FEATURES

APPLICATIONS

• 3.5V to 28V Input Voltage Range

• Consumer Applications such as Set-Top

Boxes, CPE Equipment, LCD Displays,

• Adjustable Output Voltage Down to 0.8V

Peripherals, and Battery Chargers

• Integrated 80 mΩ High Side MOSFET Supports

• Industrial and Car Audio Power Supplies

up to 3.5A Continuous Output Current

• 5V, 12V and 24V Distributed Power Systems

• High Efficiency at Light Loads with a Pulse

Skipping Eco-mode™

DESCRIPTION

• Fixed 1MHz Switching Frequency

The TPS54332 is a 28 V, 3.5 A non-synchronous

• Typical 1μA Shutdown Quiescent Current

buck converter that integrates a low R

DS(on)

high side

• Adjustable Slow Start Limits Inrush Currents

MOSFET. To increase efficiency at light loads, a

pulse skipping Eco-mode™ feature is automatically

• Programmable UVLO Threshold

activated. Furthermore, the 1 μA shutdown supply

• Overvoltage Transient Protection

current allows the device to be used in battery

• Cycle by Cycle Current Limit, Frequency Fold

powered applications. Current mode control with

Back and Thermal Shutdown Protection

internal slope compensation simplifies the external

compensation calculations and reduces component

• Available in Thermally Enhanced 8-Pin SOIC

count while allowing the use of ceramic output

PowerPAD™ Package

capacitors. A resistor divider programs the hysteresis

• Supported by SwitcherPro™ Software Tool

of the input under-voltage lockout. An overvoltage

(http://focus.ti.com/docs/toolsw/folders/print/s

transient protection circuit limits voltage overshoots

witcherpro.html)

during startup and transient conditions. A cycle by

cycle current limit scheme, frequency fold back and

thermal shutdown protect the device and the load in

the event of an overload condition. The TPS54332 is

available in an 8-pin SOIC PowerPAD™ package.

SIMPLIFIED SCHEMATIC EFFICIENCY

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Eco-mode, PowerPAD, SwitcherPro are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

PAGE 1
TPS54332 www.ti.com SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 3.5A, 28V, 1MHz, STEP DOWN DC/DC CONVERTER WITH Eco-mode™ Check for Samples: TPS54332 FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • • 3.5V to 28V Input Voltage Range Adjustable Output Voltage Down to 0.8V Integrated 80 mΩ High Side MOSFET Supports up to 3.
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TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION CONTINUED For additional design needs, see: TPS54231 TPS54232 TPS54233 TPS54331 IO(Max) 2A 2A 2A 3A TPS54332 3.5A Input Voltage Range 3.5V - 28V 3.5V - 28V 3.5V - 28V 3.5V - 28V 3.5V - 28V Switching Freq.
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TPS54332 www.ti.com SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 PACKAGE DISSIPATION RATINGS (1) (1) (2) (3) (2) (3) PACKAGE THERMAL IMPEDANCE JUNCTION TO AMBIENT PSEUDO THERMAL IMPEDANCE JUNCTION TO TOP DDA 50°C/W 5°C/W Maximum power dissipation may be limited by overcurrent protection Power rating at a specific ambient temperature TA should be determined with a junction temperature of 150°C. This is the point where distortion starts to substantially increase.
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TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) TJ = –40°C to 150°C, VIN = 3.5V to 28V (unless otherwise noted) DESCRIPTION TEST CONDITIONS MIN TYP MAX UNIT THERMAL SHUTDOWN Thermal Shutdown 165 °C SLOW START (SS PIN) Charge current V(SS) = 0.4 V 2 μA SS to VSENSE matching V(SS) = 0.
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TPS54332 www.ti.com SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 FUNCTIONAL BLOCK DIAGRAM EN VIN 165 C Thermal Shutdown 1 mA 3 mA Shutdown Shutdown Logic 1.25 V Enable Threshold Enable Comparator Boot Charge ™ ECO-MODE Minimum Clamp Boot UVLO BOOT 2.1V Error Amplifier VSENSE 2 mA PWM Comparator Gate Drive Logic gm = 92 mA/V DC gain = 800 V/V BW = 2.7 MHz Voltage Reference SS 2 kW 0.
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TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) MINIMUM CONTROLLABLE ON TIME vs JUNCTION TEMPERATURE VOLTAGE REFERENCE vs JUNCTION TEMPERATURE 0.824 0.812 0.806 0.8 0.794 0.788 0.782 -25 0 25 50 75 100 125 150 Dmin - Minimum Controllable Duty Ratio - % Tonmin - Minimum Controllable On Time - ns Vref - Voltage Reference - V 14 140 VIN = 12 V 0.818 0.
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TPS54332 www.ti.com SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 TYPICAL CHARACTERISTICS (continued) OVERVIEW The TPS54332 is a 28 V, 3.5 A, step-down (buck) converter with an integrated high-side n-channel MOSFET. To improve performance during line and load transients, the device implements a constant frequency, current mode control which reduces output capacitance and simplifies external frequency compensation design. The TPS54332 has a pre-set switching frequency of 1MHz.
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TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com ENABLE AND ADJUSTABLE INPUT UNDER-VOLTAGE LOCKOUT (VIN UVLO) The EN pin has an internal pull-up current source that provides the default condition of the TPS54332 operating when the EN pin floats. The TPS54332 is disabled when the VIN pin voltage falls below internal VIN UVLO threshold. It is recommended to use an external VIN UVLO to add Hysteresis unless VIN is greater than (VOUT + 2 V).
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TPS54332 www.ti.com SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 CURRENT MODE COMPENSATION DESIGN To simplify design efforts using the TPS54332, the typical designs for common applications are listed in Table 1. For designs using ceramic output capacitors, proper derating of ceramic output capacitance is recommended when doing the stability analysis. This is because the actual ceramic capacitance drops considerably from the nominal value when the applied voltage increases.
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TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com APPLICATION INFORMATION Figure 12. Typical Application Schematic STEP BY STEP DESIGN PROCEDURE The following design procedure can be used to select component values for the TPS54332. Alternately, the SwitcherPro™Software may be used to generate a complete design. The SwitcherPro™ Software uses an iterative design procedure and accesses a comprehensive database of components when generating a design.
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TPS54332 www.ti.com SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 OUTPUT VOLTAGE SET POINT The output voltage of the TPS54332 is externally adjustable using a resistor divider network. In the application circuit of Figure 12, this divider network is comprised of R5 and R6. The relationship of the output voltage to the resistor divider is given by Equation 4 and Equation 5: R5 ´ VREF R6 = VOUT - VREF (4) é R5 ù VOUT = VREF ´ ê +1ú ë R6 û (5) Choose R5 to be approximately 10 kΩ.
PAGE 12
TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com KIND is a coefficient that represents the amount of inductor ripple current relative to the maximum output current. In general, this value is at the discretion of the designer; however, the following guidelines may be used. For designs using low ESR output capacitors such as ceramics, a value as high as KIND = 0.4 may be used. When using higher ESR output capacitors, KIND = 0.2 yields better results. For this design example, use KIND = 0.
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TPS54332 www.ti.com ESRmax = SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 VOPPMAX ILPP - (D - 0.5 ) 4 ´ FSW ´ CO (13) Where VOPPMAX is the desired maximum peak-to-peak output ripple. The maximum RMS ripple current in the output capacitor is given by Equation 14. æ VOUT × VIN(MAX) - VOUT ö 1 ÷ ICOUT(RMS) = × ç ç VIN(MAX) × LOUT × FSW × NC ÷ 12 è ø (14) ( ) The minimum switching frequency should be used in the above equations (derated by a factor of 0.8).
PAGE 14
TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com Gain = - 20 log (2 ´ p ´ RSENSE ´ FCO ´ CO ) (19) Where: RSENSE = 1Ω/12 FCO = Closed-loop crossover frequency CO = Output capacitance The phase loss is given by Equation 20: PL = a tan (2 ´ p ´ FCO ´ RESR ´ CO ) - a tan (2 ´ p ´ FCO ´ RO ´ CO ) - 10dB (20) Where: RESR = Equivalent series resistance of the output capacitor RO = VO/IO The measured overall loop response for the circuit is given in Figure 20.
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TPS54332 www.ti.com CZ = CP = SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 1 2 ´ p ´ FZ 1 ´ Rz (26) 1 2 ´ p ´ FP1 ´ Rz (27) For this design, the two 47 μF output capacitors are used. For ceramic capacitors, the actual output capacitance is less than the rated value when the capacitors have a dc bias voltage applied. This is the case in a dc/dc converter. The actual output capacitance may be as low as 54 μF. The combined ESR is approximately .001 Ω.
PAGE 16
TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com OUTPUT VOLTAGE LIMITATIONS Due to the internal design of the TPS54332, there are both upper and lower output voltage limits for any given input voltage. The upper limit of the output voltage set point is constrained by the maximum duty cycle of 91% and is given by Equation 31: VOmax = 0.
PAGE 17
TPS54332 www.ti.com SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 Where: Ptot is the total device power dissipation (W). TA is the ambient temperature (°C). TJ is the junction temperature (°C) . Rth is the thermal resistance of the package (°C/W). TJMAX is maximum junction temperature (°C). TAMAX is maximum ambient temperature (°C). PCB LAYOUT The VIN pin should be bypassed to ground with a low ESR ceramic bypass capacitor.
PAGE 18
TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 www.ti.com Estimated Circuit Area The estimated printed circuit board area for the components used in the design of Figure 12 is 0.58 in2. This area does not include test points or connectors. ELECTROMAGNETIC INTERFERENCE (EMI) CONSIDERATIONS As EMI becomes a rising concern in more and more applications, the internal design of the TPS54332 takes measures to reduce the EMI.
PAGE 19
TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 60 180 50 150 40 10mV/div 30 IOUT Gain - dB VOUT .75 to 2.5 A Step t - Time - 500 ms/div VOUT PH 90 Phase 20 60 10 30 0 0 -10 -30 -20 -60 -30 -90 -40 -120 -50 -150 -60 10 Figure 18. TPS54332 Transient Response 120 Gain 100 1k 10k f - Frequency - Hz 100k Phase - deg www.ti.com -180 1M Figure 19.
PAGE 20
TPS54332 SLVS875B – JANUARY 2009 – REVISED FEBRUARY 2012 VOUT 1 V/div VIN 5 V/div www.ti.com VOUT PH 20 mV/div 5 V/div t - Time - 2 ms/div t - Time - 2 ms/div Figure 22. TPS54332 Start Up Figure 23. TPS54332 Output Ripple During Ecomode™ Operation SPACER REVISION HISTORY Changes from Original (January 2009) to Revision A Page • Added a new table to the Description - For additional design needs ...................................................................................
PAGE 21
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS54332DDAR Package Package Pins Type Drawing SO Power PAD DDA 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.
PAGE 22
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS54332DDAR SO PowerPAD DDA 8 2500 367.0 367.0 35.
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