Datasheet

´ -
´ ´ ´ ¦
Vout (Vinmax Vout)
Icorm s =
12 Vinmax L1 sw
Voripple
Resr <
Iripple
1 1
Co >
Voripple
8 sw
Iripple
´
´ ¦
2 Iout
Co >
sw Vout
´ D
¦ ´ D
TPS5432
SLVSB89A MARCH 2012REVISED OCTOBER 2012
www.ti.com
Equation 10 calculates the minimum output capacitance needed to meet the output voltage ripple specification.
Where fsw is the switching frequency, Vripple is the maximum allowable output voltage ripple, and Iripple is the
inductor ripple current. In this case, the maximum output voltage ripple is 18 mV. Under this requirement,
Equation 10 yields 8.1 uF.
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(9)
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Where ΔIout is the change in output current, fsw is the regulators switching frequency and ΔVout is the
allowable change in the output voltage. (10)
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Equation 11 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple
specification. Equation 11 indicates the ESR should be less than 22 m. In this case, the ESR of the ceramic
capacitor is much less than 22 m.
Additional capacitance de-ratings for aging, temperature and DC bias should be factored in which increases this
minimum value. For this example, two 22 μF 10 V X5R ceramic capacitors with 3 m of ESR are used. The
estimated capacitance after derating is 2 x 22 µF = 44 µF.
Capacitors generally have limits to the amount of ripple current they can handle without failing or producing
excess heat. An output capacitor that can support the inductor ripple current must be specified. Some capacitor
data sheets specify the RMS (Root Mean Square) value of the maximum ripple current. Equation 12 can be used
to calculate the RMS ripple current the output capacitor needs to support. For this application, Equation 12 yields
236 mA.
(11)
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(12)
INPUT CAPACITOR
The TPS5432 requires a high quality ceramic, type X5R or X7R, input decoupling capacitor of at least 10 μF of
effective capacitance and in some applications a bulk capacitance. The effective capacitance includes any DC
bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage. The
capacitor must also have a ripple current rating greater than the maximum input current ripple of the TPS5432.
The input ripple current can be calculated using Equation 13.
The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the
capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material that
is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors
because they have a high capacitance to volume ratio and are fairly stable over temperature. The output
capacitor must also be selected with the DC bias taken into account. The capacitance value of a capacitor
decreases as the DC bias across a capacitor increases.
For this example design, a ceramic capacitor with at least a 10 V voltage rating is required to support the
maximum input voltage. For this example, one 10 μF and one 0.1 μF 10 V capacitors in parallel have been
selected. The input capacitance value determines the input ripple voltage of the regulator. The input voltage
ripple can be calculated using Equation 14. Using the design example values, Ioutmax = 3 A, Cin = 10 μF, Fsw =
700 kHz, yields an input voltage ripple of 106 mV and a rms input ripple current of 1.47 A.
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