Datasheet

TPS54329
DDA
(HSOP8)
Power PAD
1
2
3
4
5
6
7
8
SW
GND
VBST
VIN
EN
VFB
VREG5
SS
TPS54329
www.ti.com SLVSAZ6A –SEPTEMBER 2011–REVISED MARCH 2012
DEVICE INFORMATION
DDA PACKAGE
(TOP VIEW)
PIN FUNCTIONS
PIN
DESCRIPTION
NAME NO.
Supply input for the high-side FET gate drive circuit. Connect 0.1µF capacitor between VBST and SW
VBST 1
pins. An internal diode is connected between VREG5 and VBST.
VIN 2 Input voltage supply pin.
SW 3 Switch node connection between high-side NFET and low-side NFET.
Ground pin. Power ground return for switching circuit. Connect sensitive SS and VFB returns to GND at
GND 4
a single point.
VFB 5 Converter feedback input. Connect to output voltage with feedback resistor divider.
5.5 V power supply output. A capacitor (typical 0.47µF) should be connected to GND. VREG5 is not
VREG5 6
active when EN is low.
EN 7 Enable input control. EN is active high and must be pulled up to enable the device.
SS 8 Soft-start control. An external capacitor should be connected to GND.
Exposed Thermal Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be connected to
Back side
Pad GND.
Copyright © 2011–2012, Texas Instruments Incorporated 5
Product Folder Link(s): TPS54329