Datasheet

1 1
8 f
> ×
×
Co
Voripple
sw
Iripple
<
Voripple
Resr
Iripple
( )
( )
Ceff Vrating
C
Vrating - Vout
´
=
( )
12 f
× -
=
× × ×
Vout Vinmax Vout
Icorms
Vinmax L1 sw
( )
-
= × ×
Vinmin Vout
Vout
Icirms Iout
Vinmin Vinmin
0.25
f
×
D =
×
Ioutmax
Vin
Cin sw
TPS54320
www.ti.com SLVS982A –AUGUST 2010–REVISED SEPTEMBER 2010
Equation 23 calculates the minimum output capacitance needed to meet the output voltage ripple specification.
Where fsw is the switching frequency, Voripple is the maximum allowable output voltage ripple, and Iripple is the
inductor ripple current. In this case, the maximum output voltage ripple is 33mV. Under this requirement,
Equation 23 yields 6.4µF.
(23)
Equation 24 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple
specification. Equation 24 indicates the ESR should be less than 40mΩ. In this case, the ESR of the ceramic
capacitor is much smaller than 40mΩ.
(24)
The capacitance of ceramic capacitors is highly dependent on the DC output voltage. Equation 25 is used to
select output capacitors based on their voltage rating. For 6.3V ceramic capacitors, the minimum capacitance
that meets the load step specification is 49.7µF. For this example, one 47mF, 6.3V, X5R ceramic capacitor with
4mΩ of ESR is used.
(25)
Capacitors generally have limits to the amount of ripple current they can handle without failing or producing
excess heat. An output capacitor that can support the inductor ripple current must be specified. Some capacitor
data sheets specify the RMS (Root Mean Square) value of the maximum ripple current. Equation 26 can be used
to calculate the RMS ripple current the output capacitor needs to support. For this application, Equation 26 yields
235mA.
(26)
Input Capacitor Selection
The TPS54320 requires a high quality ceramic, type X5R or X7R, input decoupling capacitor of 4.7µF on each
input voltage rail. In some applications additional bulk capacitance may also be required for the PVIN input. The
voltage rating of the input capacitor must be greater than the maximum input voltage. The capacitor must also
have a ripple current rating greater than the maximum input current ripple of the TPS54320. The input ripple
current for this design, using Equation 27, is 1.48A.
(27)
The value of a ceramic capacitor varies significantly over both temperature and the amount of DC bias applied to
the capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material
that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator
capacitors because of the high capacitance to volume ratio and stablity over temperature. The capacitance value
of a capacitor decreases as the DC bias across it increases. For this example design, a ceramic capacitor with at
least a 25V voltage rating is required to support the maximum input voltage. For this example, two 4.7µF 25V
capacitors will be used in parallel as the VIN and PVIN inputs are tied together, so the TPS54320 may operate
from a single supply. The input capacitance value determines the input ripple voltage of the regulator. The input
voltage ripple can be calculated using Equation 28. Using the design example values, Ioutmax = 3A, C
IN
= 9.4mF,
Fsw = 480kHz, Equation 28 yields an input voltage ripple of 166mV.
(28)
Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s) :TPS54320