Datasheet

TPS5430
TPS5431
www.ti.com SLVS632E –JANUARY 2006–REVISED SEPTEMBER 2013
THERMAL INFORMATION
TPS5430
TPS5431
THERMAL METRIC
(1)(2)(3)
UNITS
DDA (8 PINS)
θ
JA
Junction-to-ambient thermal resistance (2-layer custom board)
(4)
33
θ
JA
Junction-to-ambient thermal resistance (4-layer custom board)
(5)
26
θ
JA
Junction-to-ambient thermal resistance (standard board) 42.3
ψ
JT
Junction-to-top characterization parameter 4.9
°C/W
ψ
JB
Junction-to-board characterization parameter 20.7
θ
JC(top)
Junction-to-case(top) thermal resistance 46.4
θ
JC(bottom)
Junction-to-case(bottom) thermal resistance 0.8
θ
JB
Junction-to-board thermal resistance 20.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Maximum power dissipation may be limited by overcurrent protection
(3) Power rating at a specific ambient temperature T
A
should be determined with a junction temperature of 125°C. This is the point where
distortion starts to substantially increase. Thermal management of the final PCB should strive to keep the junction temperature at or
below 125°C for best performance and long-term reliability. See Thermal Calculations in applications section of this data sheet for more
information.
(4) Test boards conditions:
(a) 3 in x 3 in, 2 layers, thickness: 0.062 inch.
(b) 2 oz. copper traces located on the top and bottom of the PCB.
(c) 6 thermal vias in the PowerPAD area under the device package.
(5) Test board conditions:
(a) 3 in x 3 in, 4 layers, thickness: 0.062 inch.
(b) 2 oz. copper traces located on the top and bottom of the PCB.
(c) 2 oz. copper ground planes on the 2 internal layers.
(d) 6 thermal vias in the PowerPAD area under the device package.
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
TPS5430 5.5 36
VIN Input voltage range V
TPS5431 5.5 23
T
J
Operating junction temperature –40 125 °C
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: TPS5430 TPS5431