Datasheet

OUT
IN
IN
I max 0.25
V =
C sw
´
D
´ ¦
( )
IN OUT
OUT
OUT
IN IN
V min V
V
Icirms = I
V min V min
-
´ ´
OUT IN OUT
IN
V (V max V )
Icorms =
12 V max L1 sw
´ -
´ ´ ´ ¦
Oripple
ESR
ripple
V
R <
I
OUT
Oripple
ripple
1 1
C >
V
8 sw
I
´
´ ¦
OUT
OUT
OUT
2 I
C >
sw V
´ D
¦ ´ D
TPS54318
www.ti.com SLVS975A –SEPTEMBER 2009–REVISED SEPTEMBER 2013
(22)
where
• ΔI
OUT
is the change in output current,
• ƒsw is the regulators switching frequency
• ΔV
OUT
is the allowable change in the output voltage (23)
Equation 24 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple
specification. Equation 24 indicates the ESR should be less than 39 mΩ. In this case, the ESR of the ceramic
capacitor is much less than 39 mΩ.
Additional capacitance de-ratings for aging, temperature and DC bias should be factored in which increases this
minimum value. For this example, three 22 μF 10 V X5R ceramic capacitors with 3 mΩ of ESR are used.
Capacitors generally have limits to the amount of ripple current they can handle without failing or producing
excess heat. An output capacitor that can support the inductor ripple current must be specified. Some capacitor
data sheets specify the Root-Mean-Square (RMS) value of the maximum ripple current. Equation 25 calculates
the RMS ripple current required by the output capacitor for support. For this application, Equation 25 yields 222
mA.
(24)
(25)
INPUT CAPACITOR
The TPS54318 requires a high quality ceramic, type X5R or X7R, input decoupling capacitor of at least 4.7 μF of
effective capacitance and, in some applications, a bulk capacitance. The effective capacitance includes any DC-
bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage. The
capacitor must also have a ripple current rating greater than the maximum input current ripple of the TPS54318.
The input ripple current is calculated using Equation 26.
The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the
capacitor. The capacitance variations due to temperature is minimized by selecting a dielectric material that is
stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors
because they have a high capacitance-to-volume ratio and are fairly stable over temperature. The output
capacitor must also be selected with the DC bias taken into account. The capacitance value of a capacitor
decreases as the DC bias across a capacitor increases.
For this example design, a ceramic capacitor with at least a 10-V voltage rating is required to support the
maximum input voltage. For this example, one 10-μF and one 0.1-μF 10-V capacitors in parallel have been
selected. The input capacitance value determines the input ripple voltage of the regulator. The input voltage
ripple is calculated using Equation 27. Using the design example values, I
OUT
max = 3 A, C
IN
= 10 μF, ƒsw = 1
MHz, yields an input voltage ripple of 51 mV and a RMS input ripple current of 1.47 A.
(26)
(27)
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