Datasheet

0.9393
133870
Fsw(kHz)
RT(k )
=
W
W
1.0793
311890
RT (k ) =
Fsw(kHz)
SS
TPS54318
EN
PWRGD
SS
TPS54318
EN
PWRGD
EN1=2V/div
Vout1=1V/div
Vout2=1V/div
Time=5msec/div
TPS54318
SLVS975A –SEPTEMBER 2009–REVISED SEPTEMBER 2013 www.ti.com
Figure 27. Schematic for Ratiometric Startup Figure 28. Ratiometric Start-Up Using Coupled SS
Sequence Pins
CONSTANT SWITCHING FREQUENCY and TIMING RESISTOR (RT/CLK Pin)
The switching frequency of the TPS54318 is adjustable over a wide range from 200 kHz to 2000 kHz by placing
a maximum of 1000 kΩ and minimum of 85 kΩ, respectively, on the RT/CLK pin. An internal amplifier holds this
pin at a fixed voltage when using an external resistor to ground to set the switching frequency. The RT/CLK is
typically 0.5 V. To determine the timing resistance for a given switching frequency, use the curve in Figure 5 and
Figure 6, or Equation 5.
(5)
(6)
To reduce the solution size one would typically set the switching frequency as high as possible, but consider the
tradeoffs of efficiency, maximum input voltage, and minimum controllable on-time.
The minimum controllable on-time is typically 60 ns at full-current load and 110 ns at no load, and limits the
maximum operating input voltage or output voltage.
OVERCURRENT PROTECTION
The TPS54318 implements a cycle-by-cycle current limit. During each switching cycle the high-side switch
current is compared to the voltage on the COMP pin. When the instantaneous switch current intersects the
COMP voltage, the high-side switch is turned off. During overcurrent conditions that pull the output voltage low,
the error amplifier responds by driving the COMP pin high, increasing the switch current. The error amplifier
output is clamped internally. This clamp functions as a switch current limit.
FREQUENCY SHIFT
To operate at high switching frequencies and provide protection during overcurrent conditions, the TPS54318
implements a frequency shift. If frequency shift is not implemented, during an overcurrent condition the low-side
MOSFET may not turn off long enough to reduce the current in the inductor, causing a current runaway. With
frequency shift, during an overcurrent condition the switching frequency is reduced from 100%, then 75%, then
50%, then 25% as the voltage decreases from 0.8 to 0 V on VSENSE pin to allow the low-side MOSFET to be
off long enough to decrease the current in the inductor. During start-up, the switching frequency increases as the
voltage on VSENSE increases from 0 to 0.8 V. See Figure 7 for details.
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