Datasheet
+
VSNS
24
1
2
1
23
2
22
3
21
4
20
5
19
6
18
7
17
8
16
9
15
10
14
11
13
12
COMP
U1
TPS54317
C1
150 Fm
C4
0.1 Fm
C7
150pF
C6
3300pF
2200pF
442 W
10kW
C2
100 Fm
L1
1.5 Hm
C10
100 Fm
C11
1000pF
C9
10 Fm
C5
C3
C8
R5
R1
R4
R6
10kW
R3
6.81kW
R2
9.76kW
41.2kW
0.047 Fm
PWRGD
BOOT
PH
PH
PH
PH
PH
PH
NC
PGND
PGND
PwPd
AGND
RT
NC
SYNC
SS/EN
VBIAS
VIN
VIN
VIN
PGND
PGND
VOUT
PWRGD
Open
R( )=W
51k
-4.7k
ƒ (MHz)
TPS54317
SLVS619B –NOVEMBER 2005–REVISED SEPTEMBER 2009 .....................................................................................................................................
www.ti.com
APPLICATION INFORMATION
Figure 10 shows the schematic diagram for a typical TPS54317 application. The TPS54317 (U1) provides up to
3 A of output current at a nominal output voltage of 1.8 V. For proper thermal performance, the power pad
underneath the TPS54317 integrated circuit needs to be soldered well to the printed circuit board.
Figure 10. TPS54317 Schematic
(1)
INPUT VOLTAGE
The input to the circuit is a nominal 3.3 VDC, applied
OUTPUT FILTER
at J1. The optional input filter (C1) is a 150-µF
capacitor, with a maximum allowable ripple current of The output filter is composed of a 1.5-µH inductor
3 A. C9 is the decoupling capacitor for the TPS54317 and two capacitors. The inductor is a low dc
and must be located as close to the device as resistance (0.017 Ω) type, Coilcraft DO1813P-122HC.
possible. The feedback loop is compensated so that the unity
gain frequency is approximately 75 kHz.
FEEDBACK CIRCUIT
PCB LAYOUT
The resistor divider network of R1 and R2 sets the
output voltage for the circuit at 1.8 V. R1, along with Figure 11 shows a generalized PCB layout guide for
R5, R3, C5, C7, and C8 forms the loop compensation the TPS54317.
network for the circuit. For this design, a Type 3
The VIN pins should be connected together on the
topology is used.
printed circuit board (PCB) and bypassed with a low
ESR ceramic bypass capacitor. Care should be taken
OPERATING FREQUENCY
to minimize the loop area formed by the bypass
capacitor connections, the VIN pins, and the
In the application circuit, the 1.1-MHz operation is
TPS54317 ground pins. The minimum recommended
selected. Connecting a 41.2-kΩ between RT (pin 22)
bypass capacitance is 10-µF ceramic with a X5R or
and analog ground can be used to set the switching
X7R dielectric and the optimum placement is closest
frequency from 280 kHz to 1.6 MHz. To calculate the
to the VIN pins and the PGND pins.
RT resistor, use the Equation 1:
8 Submit Documentation Feedback Copyright © 2005–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS54317