Datasheet

PGND
AGND
COMP PH PH PH PH
PGND PGND
VIN VIN VIN
VBIAS
BOOT PWRGD
SS/ENA
Exposed
ThermalPad
(Pin25)
NC
VSNS
1 2 3 4
5
6
7
8
9
10
11
12
13141516171819
20
21
22
23
24
PGND
RT
NC
PH
PH
SYNC
TPS54317
www.ti.com ..................................................................................................................................... SLVS619B –NOVEMBER 2005–REVISED SEPTEMBER 2009
PIN ASSIGNMENTS
RHF PACKAGE
(BOTTOM VIEW)
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME NO.
COMP 1 Error amplifier output. Connect compensation network from COMP to VSENSE.
Power good open drain output. High when VSENSE ≥ 90% V
ref
, otherwise PWRGD is low. Note that output is low
PWRGD 2
when SS/ENA is low or internal shutdown signal active.
Bootstrap input. 0.022-μF to 0.1-μF low-ESR capacitor connected from BOOT to PH generates floating drive for the
BOOT 3
high-side FET driver.
PH 4-9 Phase input/output. Junction of the internal high and low-side power MOSFETs, and output inductor.
Power ground. High current return for the low-side driver and power MOSFET. Connect PGND with large copper
PGND 11-14
areas to the input and output supply returns, and negative terminals of the input and output capacitors.
Input supply for the power MOSFET switches and internal bias regulator. Bypass VIN pins to PGND pins close to
VIN 15-17
device package with a high quality, low ESR 1-μF to 10-μF ceramic capacitor.
Internal bias regulator output. Supplies regulated voltage to internal circuitry. Bypass VBIAS pin to AGND pin with a
VBIAS 18
high quality, low ESR 0.1-μF to 1.0-μF ceramic capacitor.
Slow-start/enable input/output. Dual function pin which provides logic input to enable/disable device operation and
SS/ENA 19
capacitor input to externally set the start-up time.
Synchronization input. Dual function pin which provides logic input to synchronize to an external oscillator or pin
SYNC 20 select between two internally set switching frequencies. When used to synchronize to an external signal, a resistor
must be connected to the RT pin.
RT 22 Frequency setting resistor input. Connect a resistor from RT to AGND to set the switching frequency, f
s
.
Analog ground. Return for compensation network/output divider, slow-start capacitor, VBIAS capacitor, RT resistor
AGND 23, 25
and SYNC pin. Make PowerPAD connection to AGND.
VSNS 24 Error amplifier inverting input.
NC 10, 21 Not connected internally.
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