Datasheet

TPS54310-Q1
SGLS280D − JANUARY 2005 − REVISED JUNE 2009
www.ti.com
4
ELECTRICAL CHARACTERISTICS
T
J
= −40°C to 125°C, VIN = 3 V to 6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE, VIN
VIN input voltage range 3 6 V
f
s
= 350 kHz, FSEL ≤ 0.8 V, RT open, phase
pin open
6.2 9.6
Quiescent current
f
s
= 550 kHz, FSEL ≥ 2.5 V, RT open, phase
pin open
8.4 12.8
mA
Shutdown, SS/ENA = 0 V 1 1.4
UNDER VOLTAGE LOCK OUT
Start threshold voltage, UVLO 2.95 3
V
Stop threshold voltage, UVLO 2.7 2.8
V
Hysteresis voltage, UVLO 0.16 V
Rising and falling edge deglitch, UVLO
(1)
2.5 µs
BIAS VOLTAGE
V
Output voltage, VBIAS I
(VBIAS)
= 0 2.7 2.8 2.95 V
V
O
Output current, VBIAS
(2)
100 µA
CUMULATIVE REFERENCE
V
ref
Accuracy
(1)
0.882 0.891 0.900 V
REGULATION
Line regulation
(1) (3)
I
L
= 1.5 A, f
s
= 350 kHz, T
J
= 125°C 0.07
%/V
Line regulation
(1)
(3)
I
L
= 1.5 A, f
s
= 550 kHz, T
J
= 125°C 0.07
%/V
Load regulation
(1) (3)
I
L
= 0 A to 3 A, f
s
= 350 kHz, T
J
= 125°C 0.03
%/A
Load regulation
(1)
(3)
I
L
= 0 A to 3 A, f
s
= 550 kHz, T
J
= 125°C 0.03
%/A
OSCILLATOR
Internally set free running frequency range
FSEL ≤ 0.8 V, RT open 265 350 440
kHz
Internally set free-running frequency range
FSEL ≥ 2.5 V, RT open 415 550 680
kHz
RT = 180 kΩ (1% resistor to AGND)
(1)
252 280 308
Externally set free-running frequency range
RT = 160 kΩ (1% resistor to AGND) 290 312 350
kHz
Externally
set
free running
frequency
range
RT = 68 kΩ (1% resistor to AGND)
(1)
663 700 762
kHz
High-level threshold voltage, FSEL 2.5 V
Low-level threshold voltage, FSEL 0.8 V
Pulse duration, FSEL
(1)
50 ns
Frequency range, FSEL
(1) (4)
330 700 kHz
Ramp valley
(1)
0.75 V
Ramp amplitude (peak-to-peak)
(1)
1 V
Minimum controllable on time
(1)
200 ns
Maximum duty cycle
(1)
90%
(1)
Specified by design
(2)
Static resistive loads only
(3)
Specified by the circuit used in Figure 10.
(4)
To ensure proper operation when RC filter is used between external clock and FSEL pin, the recommended values are R ≤ 1kΩ and
C ≤ 120 pF.