Datasheet

TPS54310-Q1
SGLS280D − JANUARY 2005 − REVISED JUNE 2009
www.ti.com
2
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
VIN
PH
TPS54310
BOOT
PGND
COMP
VSENSE
AGND
VBIAS
Compensation
Network
Input Output
Simplified Schematic
80
82
84
86
88
90
92
94
96
0 0.5 1 1.5 2 2.5 3
Load Current − A
Efficiency − %
T
A
= 25°C
V
I
= 5 V
V
O
= 3.3 V
EFFICIENCY
vs
LOAD CURRENT
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
TPS54310-Q1 UNIT
VIN, SS/ENA, FSEL −0.3 to 7 V
Input voltage range V
RT −0.3 to 6 V
Input voltage range, V
I
VSENSE −0.3 to 4 V
BOOT −0.3 to 17 V
Output voltage range V
VBIAS, PWRGD, COMP −0.3 to 7 V
Output voltage range, V
O
PH −0.6 to 10 V
Source current I
PH Internally Limited
Source current, I
O
COMP, VBIAS 6 mA
PH 6 A
Sink current
COMP 6 mA
Sink
current
SS/ENA,PWRGD 10 mA
Voltage differential AGND to PGND ±0.3 V
Continuous power dissipation
See Power Dissipation
Rating Table
Operating virtual junction temperature range, T
J
−40 to 150 °C
Storage temperature, T
stg
−65 to 150 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300 °C
(1)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.