Datasheet
RECOMMENDED OPERATING CONDITIONS
PACKAGE DISSIPATION RATINGS
(1) (2)
ELECTRICAL CHARACTERISTICS
TPS54310-EP
www.ti.com
..................................................................................................................................................................................................... SLVS818 – APRIL 2008
MIN MAX UNIT
V
I
Input voltage 3 6 V
T
J
Operating virtual-junction temperature – 55 125 ° C
THERMAL IMPEDANCE T
A
= 25 ° C T
A
= 70 ° C T
A
= 85 ° C
PACKAGE
JUNCTION-TO-AMBIENT POWER RATING POWER RATING POWER RATING
20-Pin PWP with solder 26 ° C/W 3.85 W
(3)
2.12 W 1.54 W
20-Pin PWP without solder 57.5 ° C/W 1.73 W 0.96 W 0.69 W
(1) For more information on the PWP package, refer to TI technical brief, literature number SLMA002.
(2) Test board conditions:
a. 3 inch × 3 inch, 2 layers, Thickness: 0.062 inch
b. 1.5 oz copper traces located on the top of the PCB
c. 1.5 oz copper ground plane on the bottom of the PCB
d. Ten thermal vias (see recommended land pattern in application section of this data sheet)
(3) Maximum power dissipation may be limited by overcurrent protection.
T
J
= – 55 ° C to 125 ° C, VIN = 3 V to 6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE, VIN
VIN input voltage range 3 6 V
f
s
= 350 kHz, SYNC = 0.8 V, RT open 6.2 9.6
Quiescent current f
s
= 550 kHz, SYNC ≥ 2.5 V, RT open, phase pin open 8.4 12.8 mA
Shutdown, SS/ENA = 0 V 1 1.4
UNDERVOLTAGE LOCKOUT
Start threshold voltage, UVLO 2.95 3
V
Stop threshold voltage, UVLO 2.70 2.80
Hysteresis voltage, UVLO 0.10 0.16 V
Rising and falling edge deglitch, UVLO
(1)
2.5 µs
BIAS VOLTAGE
Output voltage, VBIAS I
(VBIAS)
= 0 2.70 2.80 2.95 V
V
O
Output current, VBIAS
(2)
100 µA
CUMULATIVE REFERENCE
V
ref
Accuracy 0.880 0.891 0.900 V
REGULATION
I
L
= 1.5 A, f
s
= 350 kHz, T
J
= 85 ° C 0.07
Line regulation
(1) (3)
%/V
I
L
= 1.5 A, f
s
= 550 kHz, T
J
= 85 ° C 0.07
I
L
= 0 A to 3 A, f
s
= 350 kHz, T
J
= 85 ° C 0.03
Load regulation
(1) (3)
%/A
I
L
= 0 A to 3 A, f
s
= 550 kHz, T
J
= 85 ° C 0.03
(1) Specified by design
(2) Static resistive loads only
(3) Specified by the circuit used in Figure 10 .
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