Datasheet

EXPOSED THERMAL
PAD AREA
BOOST
CAPACITOR
VOUT2
VIA to Internal or
Bottom Layer Ground Plane
OUTPUT2
INDUCTOR
OUTPUT2
FILTER
CAPACITORS
SLOW
START
CAP 2
ANALOG
GROUND
TRACE
VIN INPUT
BYPASS
CAPACITORS
VIN
FEEDBACK
RESISTORS
Etch on Bottom Layer,
Internal Layer or
Under Component
BIAS
CAP
VIN HIGH
FREQUENCY
BYPASS
CAPACITOR
VBST1
SW1
SW2
VIN1
VIN2
VFB1
VREG5
GND
SS2
EN2
PGND2
PGND1
16
7
5
6
2
3
4
1
15
12
11
9
8
10
14
13
VFB2
VBST2
E 1N
SS1
TO ENABLE
CONTROL
BOOST
CAPACITOR
OUTPUT1
INDUCTOR
OUTPUT1
FILTER
CAPACITORS
SLOW
START
CAP 1
VIN INPUT
BYPASS
CAPACITORS
FEEDBACK
RESISTORS
POWER
GROUND
VIN HIGH
FREQUENCY
BYPASS
CAPACITOR
KEEP
VIAS > 3-4 mm
FROM OUTPUT
CAPACITORS
KEEP OUTPUT
VIAS > 25 mm
FROM INPUT VIAS
KEEP
VIAS > 3-4 mm
FROM INPUT
CAPACITORS
NOTE: IT IS POSSIBLE TO PLACE
SOME COMPONENTS SUCH AS
BOOST CAPACITOR AND FEEDBACK
RESISTORS ON BOTTOM LAYER
VOUT1
TO ENABLE
CONTROL
POWER
GROUND
KEEP
VIAS > 3-4 mm
FROM OUTPUT
CAPACITORS
KEEP OUTPUT
VIAS > 25 mm
FROM INPUT VIAS
KEEP
VIAS > 3-4 mm
FROM INPUT
CAPACITORS
Internal or Bottom
Layer Ground Plane
VIA to internal or
Bottom Layer Etch
Etch or Copper Fill
on Top Layer
INTERNAL OR
BOTTOM LAYER
GROUND PLANE
TPS542951
www.ti.com SLVSBI4B –JULY 2012–REVISED OCTOBER 2013
Figure 27. RSA Package Layout
Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: TPS542951