Datasheet

SW1
VIN1
VBST1
EN1
VFB1
GND
VREG 5
PGND1
6
VIN2
VBST2
EN2
SW2
PG1
5
1
3
PG2
9
10
11
PGND2
2
4
7
13
12
14
8
15
16
VFB2
VIN2
BIAS
CAP
VIN HIGH
FREQUENCY
BYPASS
CAPACITOR
～0.1µF
VIN INPUT
BYPASS
CAPACITOR
10µF x2
OUTPUT
INDUCTOR
OUTPUT
FILTER
CAPACITOR
POWER
GND
TO ENABLE
CONTROL
Keep
distance more
than
1
inch
Recommend to keep
distance more than 3-4mm.
(to avoid noise scattering,
especially GND plane.)
To feedback
resisters
VO2
Feedback
resisters
GND
PLANE
2
,3 or bottom
layer
Symmetrical Layout
for CH1 and CH2
Switching noise
flows through IC
and C
IN
. It avoids
the thermal Pad
.
Via to GND Plane
- Blue parts can be placed on the bottom side
- Connect the SWx pins through another layer with the inductor
(yellow line)
TPS54294
www.ti.com SLVSB00D –OCTOBER 2011–REVISED SEPTEMBER 2013
Figure 26. TPS54294 Layout
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: TPS54294