Datasheet

TPS54290, TPS54291, TPS54292
SLUS973 –OCTOBER 2009 www.ti.com
BOOTSTRAP FOR N-CHANNEL MOSFET
A bootstrap circuit provides a voltage source higher than the input voltage and of sufficient energy to fully
enhance the switching MOSFET each switching cycle. The PWM duty cycle is limited to maximum, i.e., 90% for
TPS54291, allowing an external bootstrap capacitor to charge through an internal synchronous switch (between
BP and BOOTx) during every cycle. When the PWM switch is commanded to turn ON, the energy used to drive
the MOSFET gate is derived from the voltage on this capacitor.
Because this is a charge transfer circuit, care must be taken in selecting the value of the bootstrap capacitor. It
must be sized such that the energy stored in the capacitor on a per cycle basis is greater than the gate charge
requirement of the MOSFET being used. Typically a ceramic capacitor with a value between 22nF and 68nF is
selected for the bootstrap capacitor.
OUTPUT OVERLOAD PROTECTION
In the event of an overcurrent on either output after the output reaches regulation, pulse-by-pulse current limit is
in effect for that output. In addition, an output under-voltage (UV) comparator monitors the FBx voltage (which
follows the output voltage) to declare a fault if the output drops below 85% of regulation. During this fault
condition, both PWM outputs are disabled. This ensures that both outputs discharge to GND, in the event that
over-current is on one output while the other is not loaded. The converter enters a hiccup mode timeout before
attempting to restart.
If an over-current condition exists during soft start, pulse-by-pulse current limiting reduces the pulse width of the
affected output’s PWM. In addition, if an overcurrent pulse is detected, six clock cycles are skipped before a next
PWM pulse is enabled, effectively dividing the PWM frequency by six and preventing excessive current build up
in the indictor. At the end of the soft start time, a UV fault is declared and the operation is the same as described
above.
The overcurrent threshold for Output1 and Output2 are set nominally 2.2 A and 3.8 A respectively.
DESIGN HINT: The OCP Threshold refers to the peak current in the internal switch. Be sure to add the 1/2
of the peak inductor ripple current to the DC load current in determining how close the actual operating point
is to the OCP Threshold.
OPERATING NEAR MAXIMUM DUTY CYCLE
If the TPS5429x is operated at maximum duty cycle, and if the input voltage is insufficient to support the output
voltage (at full load or during a load current transient) then there is a possibility that the output voltage falls from
regulation and trip the output UV comparator. If this should occur, the TPS5429x protection circuitry declares a
fault and enter hiccup mode.
DESIGN HINT: Ensure that under ALL conditions of line and load regulation that there is sufficient duty cycle
to maintain output voltage regulation.
DUAL SUPPLY OPERATION
It is possible to operate a TPS5429x from two supply voltages. If this application is desired, then the sequencing
of the supplies must be such that PVDD2 is above the UVLO voltage before PVDD1 begins to rise. This is to
ensure the internal regulator and the control circuitry is in operation before PVDD1 supplies energy to the output.
In addition, Output1 must be held in the disabled state (EN1 high) until there is sufficient voltage on PVDD1 to
support Output1 in regulation. (See Operating near Maximum Duty Cycle)
The preferred sequence of events follows:
1. PVDD2 rises above the input UVLO voltage
2. PVDD1 rises with Output1 disabled until PVDD1 rises above level to support Output1 regulation
With the two conditions above satisfied, there is no restriction on PVDD2 to be greater than, or less than PVDD1.
DESIGN HINT: An R-C delay on EN1 may be used to delay the startup of Output1 for a long enough period
of time to ensure PVDD1 can support Output1 load.
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