Datasheet

TPS54290, TPS54291, TPS54292
SLUS973 OCTOBER 2009
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ELECTRICAL CHARACTERISTICS (continued)
T
J
= –40°C to 125°C, PVDD1 and 2 = 12V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BOOTSTRAP (Applied to both channels)
R
BOOT
Bootstrap switch resistance R(BP to BOOT), I external = 10 mA 33 Ω
PGOOD
V
UV
Feedback voltage limit for PGOOD 660 730 mV
V
PG-HYST
(3)
PGOOD hysteresis voltage on FB 40 mV
OUTPUT STAGE (Applied to both channels)
On resistance of high-side FET
R
DS(on1)
(HS)
(3)
170 265 mΩ
and bondwire on CH1
On resistance of high-side FET
R
DS(on2)
(HS)
(3)
120 190 mΩ
and bondwire on CH2
On resistance of low-side FET and mΩ
R
DS(on1)
(LS)
(3)
120 190
bondwire on CH1
On resistance of low-side FET and
R
DS(on2)
(LS)
(3)
90 150 mΩ
bondwire on CH2
t
ON_MIN
(3)
Miimum controllable pulse width 150 ns
Minimum duty
V
FB
= 0.9 V 0%
cycle
HDRV off to LDRV on 20 ns
t
DEAD
(3)
Output driver dead time
LDRV off to HDRV on 20 ns
TPS54290 90% 96%
D
MAX
Maximum duty cycle TPS54291 85% 91%
TPS54292 78% 82%
THERMAL SHUTDOWN
T
SD
(3)
Shutdown temperature 145 °C
T
SD_HYS
(3)
Hysteresis 20 °C
(3) Specified by design. Not tested in production.
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