Datasheet

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DEVICE INFORMATION
PIN CONNECTIONS
1
2
3
4
14
13
12
11
PVDD2
BOOT2
SW2
BP
PVDD1
BOOT1
SW1
GND
5
6
7
10
9
8
SEQ
ILIM2
FB2
EN1
EN2
FB1
Thermal Pad
(bottom side)
HTSSOP (PWP)
(Top View)
TPS54283 , , TPS54286
SLUS749C – JULY 2007 – REVISED OCTOBER 2007
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME NO.
Input supply to the high side gate driver for Output 1. Connect a 22-nF to 82-nF capacitor from this pin
to SW1. This capacitor is charged from the BP pin voltage through an internal switch. The switch is
BOOT1 2 I
turned ON during the OFF time of the converter. To slow down the turn ON of the internal FET, a small
resistor (1 Ω to 3 Ω ) may be placed in series with the bootstrap capacitor.
Input supply to the high side gate driver for Output 2. Connect a 22-nF to 82-nF capacitor from this pin
to SW2. This capacitor is charged from the BP pin voltage through an internal switch. The switch is
BOOT2 13 I
turned ON during the OFF time of the converter. To slow down the turn ON of the internal FET, a small
resistor (1 Ω to 3 Ω ) may be placed in series with the bootstrap capacitor.
Regulated voltage to charge the bootstrap capacitors. Bypass this pin to GND with a low ESR (4.7- µ F
BP 11 -
to 10- µ F X7R or X5R preferred) ceramic capacitor.
Active low enable input for Output 1. If the voltage on this pin is greater than 1.55 V, Output 1 is
disabled (high-side switch is OFF). A voltage of less than 0.9 V enables Output 1 and allows soft start of
EN1 5 I
Output 1 to begin. An internal current source drives this pin to PVDD2 if left floating. Connect this pin to
GND to force "always ON" operation.
Active low enable input for Output 2. If the voltage on this pin is greater than 1.55 V, Output 2 is
disabled (high-side switch is OFF). A voltage of less than 0.9 V enables Output 2 and allows soft start of
EN2 6 I
Output 2 to begin. An internal current source drives this pin to PVDD2 if left floating. Connect this pin to
GND to force "always ON" operation.
Voltage feedback pin for Output 1. The internal transconductance error amplifier adjusts the PWM for
Output 1 to regulate the voltage at this pin to the internal 0.8-V reference. A series resistor divider from
FB1 7 I Output 1 to ground, with the center connection tied to this pin, determines the value of the regulated
output voltage. Compensation for the feedback loop is provided internally to the device. See Feedback
Loop and Inductor-Capacitor (L-C) Filter section for further information.
Voltage feedback pin for Output 2. The internal transconductance error amplifier adjusts the PWM for
Output 2 to regulate the voltage at this pin to the internal 0.8-V reference. A series resistor divider from
FB2 8 I Output 2 to ground, with the center connection tied to this pin, determines the value of the regulated
Output voltage. Compensation for the feedback loop is provided internally to the device. See Feedback
Loop and Inductor-Capacitor (L-C) Filter section for further information.
GND 4 - Ground pin for the device. Connect directly to Thermal Pad.
Current limit adjust pin for Output 2 only. This function is intended to allow a user with asymmetrical
load currents (Output 1 load current much greater than Output 2 load current) to optimize component
ILIM2 9 I scaling of the lower current output while maintaining proper component derating in a overcurrent fault
condition. The discrete levels are available as shown in Table 2 . Note: An internal 2-resistor divider
(150-k Ω each) connects BP to ILIM2 and to GND.
Power input to the Output 1 high side MOSFET only. This pin should be locally bypassed to GND with a
PVDD1 1 I
low ESR ceramic capacitor of 10- µ F or greater.
The PVDD2 pin provides power to the device control circuitry, provides the pull-up for the EN1 and EN2
pins and provides power to the Output 2 high-side MOSFET. This pin should be locally bypassed to
PVDD2 14 I
GND with a low ESR ceramic capacitor of 10- µ F or greater. The UVLO function monitors PVDD2 and
enables the device when PVDD2 is greater than 4.1 V.
Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TPS54283 TPS54286