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REG DD BP BP
IN max IN max
P I V I V V» ´ + ´ -
(42)
Design Example Test Results
SW 3.3 V
SW 5 V
V
IN
= 12 V
t − Time − 40 ns/div
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1
10
40
70
0
90
100
50
I
LOAD
- Load Current - A
h - Efficiency - %
30
20
60
80
V
IN
= 9.6 V
V
OUT
= 5.0 V
V
IN
(V)
9.6
12.0
13.2
V
IN
= 12.0 V
V
IN
= 13.2 V
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1
10
40
70
0
90
100
50
I
LOAD
- Load Current - A
h - Efficiency - %
30
20
60
80
V
IN
= 13.2 V
V
IN
= 9.6 V
V
IN
= 12.0 V
V
OUT
= 3.3 V
V
IN
(V)
9.6
12.0
13.2
TPS54283 , , TPS54286
SLUS749C – JULY 2007 – REVISED OCTOBER 2007
With no external load on BP (I
BP
=0) the regulator power dissipation is 66 mW.
Total power dissipation in the device is the sum of conduction and switching for both channels plus regulator
losses.
The total power dissipation is P
DISS
=0.198+0.136+0.017+0.017+.066 = 434 mW.
The following results are from the TPS54283-001 EVM.
Figure 39. Switching Node Waveforms
Figure 40. 5.0-V Output Efficiency vs. Load Current Figure 41. 3.3-V Output Efficiency vs. Load Current
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