Datasheet

NC
NC
SYNC
LPM
EN
RT
Rslew
RST
Cdly
GND SS
OV_TH
RST_TH
VSENSE
COMP
VReg
PH
VIN
VIN
BOOT
Output
Inductor
Output
Capacitor
TopsideGround Area
Ground
Plane
Signalviato
GroundPlane
CatchDiode
CompensationNetwork
Resistor
Divider
SupervisorNetwork
TopsideSupply Area
ThermalVia
SignalVia
InputCapacitor
TPS54262-Q1
www.ti.com SLVS996C –SEPTEMBER 2009–REVISED JUNE 2010
PCB LAYOUT GUIDELINES
The following guidelines are recommended for PCB layout of the TPS54262 device.
Traces and Ground Place Routing
All power (high current) traces should be thick and as short as possible. The inductor and output capacitors
should be as close to each other as possible. This will reduce EMI radiated by the power traces due to high
switching currents. In a two sided PCB, it is recommended to have ground planes on both sides of the PCB to
help reduce noise and ground loop errors. The ground connection for the input and output capacitors and IC
ground should be connected to this ground plane.
In a multilayer PCB, the ground plane is used to separate the power plane (high switching currents and
components are placed) from the signal plane (where the feedback trace and components are) for improved
performance.
Also, it is recommended to arrange the components such that the switching current loops curl in the same
direction. This can be done by placing the high current components such that during conduction, the current
paths are in the same direction. This will prevent magnetic field reversal caused by the traces between the two
half cycles, helping to reduce radiated EMI.
Component Routing for the Feedback Loop
It is recommended to route the feedback traces such that there is minimum interaction with any noise sources
associated with the switching components. Recommended practice is to ensure the inductor is placed away from
the feedback trace to prevent EMI noise source.
Figure 32. PCB Layout Example
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Product Folder Link(s): TPS54262-Q1