Datasheet
TPS54262-Q1
SLVS996C –SEPTEMBER 2009–REVISED JUNE 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
T
J
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
–40°C to 150°C TSSOP – PWP Reel of 2000 TPS54262QPWPRQ1 54262Q1
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
ABSOLUTE MAXIMUM RATINGS
(1)
VALUE UNIT
Input voltage EN -0.3 to 60 V
VIN -0.3 to 60
VReg -0.3 to 20
LPM -0.3 to 5.5
OV_TH -0.3 to 5.5
RST_TH -0.3 to 5.5
SYNC -0.3 to 5.5
VSENSE -0.3 to 5.5
Output voltage BOOT -0.3 to 65 V
PH -0.3 to 60
-2 for 30ns
-1 for 200ns
-0.85 at T
J
= -40°C
-0.5 at T
J
= 125°C
RT -0.3 to 5.5
RST -0.3 to 5.5
Cdly -0.3 to 8
SS -0.3 to 8
COMP -0.3 to 7
Temperature Operating virtual junction temperature range, T
J
-40 to 150 °C
Storage temperature range, T
S
-55 to 165
Electrostatic discharge (HBM)
(2)
2 kV
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages
are with respect to ground.
(2) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
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