Datasheet

Lf2
VD)(1
II
sw
Reg
L_LPML_DISCONT
××
×-
==
Lf2
VD)(1
II
sw
Reg
L_LPML_DISCONT
××
×-
==
RegDS(ON)Load
V~RIVIN <´-
MinOFF
sw
Reg
t
f
1
VIN
V
1
-
>´
÷
÷
ø
ö
ç
ç
è
æ
-
and
TPS54262-Q1
www.ti.com
SLVS996C SEPTEMBER 2009REVISED JUNE 2010
1) Active Mode Continuous Conduction Mode (CCM)
In this mode of operation the switcher operates in continuous conduction mode, and the inductor current is
always non-zero if the total load current (internal and external) is greater than I
L_DISCONT
shown in Equation 3.
(3)
Where,
D = duty cycle
L = output inductor
V
Reg
= output voltage
f
sw
= switching frequency
For VIN < 8.5 V, the device enables an internal ~100 Ω load. This, combined with the external load, can cause
the device to enter into CCM even under light external loading conditions (see Figure 14). This mode of
operation is shown in Figure 15 is also called the Normal mode of operation.
Figure 15. Active Mode CCM Figure 16. Active Mode DCM
2) Active Mode Discontinuous Conduction Mode (DCM)
In this mode of operation the switcher operates in discontinuous conduction mode, and the inductor current
becomes zero if the total load current (internal and external) is less than I
L_DISCONT
shown in Equation 4.
(4)
The device enters in this mode of operation when LPM pin is set high (i.e disabled) and output loading is less
than I
L_DISCONT
. This mode of operation is shown in Figure 16.
3) Pulse Skip Mode (PSM)
In this mode of operation the switcher operates in discontinuous conduction mode, and the inductor current
becomes zero. The device enters in this mode of operation in the following conditions:
At low input voltages when V
Reg
starts losing regulation and the OFF time (t
OFF
) of the switching FET tends to
be close to or slightly less than the minimum OFF time (t
OFF-Min
). If OFF time is much smaller than t
OFF-Min
,
there is a risk that the part stops switching and regulation is lost until power is re-cycled with OFF time
greater than t
OFF-Min
. This mode of operation is shown in Figure 18. Comparing Figure 17 and Figure 18,
pulse skipping occurs in Figure 18 but not in Figure 17 under similar output loading conditions.
(5)
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