Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder SOIC 8

VIN

GND

BOOT

VSENSE

COMP

VIN

VOUT

TPS54231

BOOT

Ren1

Ren2

100

0.01 0.1 1 10

Efficiency-%

I -LoadCurrent- A

V =3.3V

V =12V

V =18V

V =24V

V =28V

V =5V

TPS54231

www.ti.com

SLUS851C –OCTOBER 2008–REVISED JULY 2012

2A, 28V INPUT, STEP DOWN DC/DC CONVERTER WITH ECO-MODE™

Check for Samples: TPS54231

FEATURES

APPLICATIONS

• 3.5 V to 28 V Input Voltage Range

• Consumer Applications such as Set-Top

Boxes, CPE Equipment, LCD Displays,

• Adjustable Output Voltage Down to 0.8 V

Peripherals, and Battery Chargers

• Integrated 80 mΩ High Side MOSFET Supports

• Industrial and Car Audio Power Supplies

up to 2 A Continuous Output Current

• 5V, 12V and 24V Distributed Power Systems

• High Efficiency at Light Loads with a Pulse

Skipping Eco-mode™

DESCRIPTION

• Fixed 570 kHz Switching Frequency

The TPS54231 is a 2 V, 2 A non-synchronous buck

• Typical 1 μA Shutdown Quiescent Current

converter that integrates a low R

DS(on)

high side

• Adjustable Slow Start Limits Inrush Currents

MOSFET. To increase efficiency at light loads, a

pulse skipping Eco-mode™ feature is automatically

• Programmable UVLO Threshold

activated. Furthermore, the 1 μA shutdown supply

• Overvoltage Transient Protection

current allows the device to be used in battery

• Cycle-by-Cycle Current Limit, Frequency Fold

powered applications. Current mode control with

Back and Thermal Shutdown Protection

internal slope compensation simplifies the external

compensation calculations and reduces component

• Available in Easy-to-Use SOIC8 Package

count while allowing the use of ceramic output

• Supported by SwitcherPro™ Software Tool

capacitors. A resistor divider programs the hysteresis

(http://focus.ti.com/docs/toolsw/folders/print/s

of the input under-voltage lockout. An overvoltage

witcherpro.html)

transient protection circuit limits voltage overshoots

during startup and transient conditions. A cycle by

cycle current limit scheme, frequency fold back and

thermal shutdown protect the device and the load in

the event of an overload condition. The TPS54231 is

available in an 8-pin SOIC package that has been

internally optimized to improve thermal performance.

SIMPLIFIED SCHEMATIC EFFICIENCY

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Eco-mode, SwitcherPro, PowerPAD, SWIFT are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (27 pages)

PAGE 1
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 2A, 28V INPUT, STEP DOWN DC/DC CONVERTER WITH ECO-MODE™ Check for Samples: TPS54231 FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • • 3.5 V to 28 V Input Voltage Range Adjustable Output Voltage Down to 0.
PAGE 2
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION CONTINUED For additional design needs, see: TPS54231 TPS54232 TPS54233 TPS54331 IO(Max) 2A 2A 2A 3A TPS54332 3.5A Input Voltage Range 3.5V - 28V 3.5V - 28V 3.5V - 28V 3.5V - 28V 3.5V - 28V Switching Freq.
PAGE 3
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 PACKAGE DISSIPATION RATINGS (1) (1) (2) (3) (2) (3) PACKAGE THERMAL IMPEDANCE JUNCTION TO AMBIENT PSEUDO THERMAL IMPEDANCE JUNCTION TO TOP SOIC8 100°C/W 5°C/W Maximum power dissipation may be limited by overcurrent protection Power rating at a specific ambient temperature TA should be determined with a junction temperature of 150°C. This is the point where distortion starts to substantially increase.
PAGE 4
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) TJ = –40°C to 150°C, VIN = 3.5V to 28V (unless otherwise noted) DESCRIPTION TEST CONDITIONS MIN TYP MAX UNIT THERMAL SHUTDOWN Thermal Shutdown 165 °C SLOW START (SS PIN) Charge current V(SS) = 0.4 V 2 μA SS to VSENSE matching V(SS) = 0.4 V 10 mV DEVICE INFORMATION PIN ASSIGNMENTS BOOT 1 8 PH VIN 2 7 GND EN 3 6 COMP SS 4 5 VSENSE PIN FUNCTIONS PIN DESCRIPTION NAME NO.
PAGE 5
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 FUNCTIONAL BLOCK DIAGRAM EN VIN 165 C Thermal Shutdown 1 mA 3 mA Shutdown Shutdown Logic 1.25 V Enable Threshold Enable Comparator Boot Charge ™ ECO-MODE Minimum Clamp Boot UVLO BOOT 2.1V Error Amplifier VSENSE 2 mA PWM Comparator Gate Drive Logic gm = 92 mA/V DC gain = 800 V/V BW = 2.7 MHz Voltage Reference SS 2 kW 0.
PAGE 6
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com TYPICAL CHARACTERIZATION CURVES (continued) MINIMUM CONTROLLABLE ON TIME vs JUNCTION TEMPERATURE VOLTAGE REFERENCE vs JUNCTION TEMPERATURE 0.8060 0.8000 0.7940 0.7880 0.7820 0.7760 -50 -25 0 25 50 75 100 TJ - Junction Temperature - °C 125 7.25 Minimum Controllable Duty Ratio - % 0.8120 VIN = 12 V VIN = 12 V Tonmin - Minimum Controllable On Time - ns 0.8180 Vref - Voltage Reference - V 7.50 140 0.
PAGE 7
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 SUPPLEMENTAL APPLICATION CURVES TYPICAL MINIMUM OUTPUT VOLTAGE vs INPUT VOLTAGE TYPICAL MAXIMUM OUTPUT VOLTAGE vs INPUT VOLTAGE 30 1.25 25 VO - Output Voltage - V VO - Output Voltage - V 1.15 1.05 IO = 1 A 0.95 IO = 2 A 20 IO = 1 A 15 IO = 2 A 10 0.85 5 0.75 0 3 8 13 18 VI - Input Volatage - V 23 28 3 Figure 9. 8 13 18 VI - Input Voltage - V 23 28 Figure 10.
PAGE 8
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com ECO-MODETM The TPS54231 is designed to operate in pulse skipping Eco-modeTM at light load currents to boost light load efficiency. When the peak inductor current is lower than 100 mA typically, the COMP pin voltage falls to 0.5 V typically and the device enters Eco-modeTM . When the device is in Eco-modeTM, the COMP pin voltage is clamped at 0.5 V internally which prevents the high side integrated MOSFET from switching.
PAGE 9
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 PROGRAMMABLE SLOW START USING SS PIN It is highly recommended to program the slow start time externally because no slow start time is implemented internally. The TPS54231 effectively uses the lower voltage of the internal voltage reference or the SS pin voltage as the power supply’s reference voltage fed into the error amplifier and will regulate the output accordingly. A capacitor (CSS) on the SS pin to ground implements a slow start time.
PAGE 10
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com The TPS54231 provides robust protection during short circuits. There is potential for overcurrent runaway in the output inductor during a short circuit at the output. The TPS54231 solves this issue by increasing the off time during short circuit conditions by lowering the switching frequency. The switching frequency is divided by 8, 4, 2, and 1 as the voltage ramps from 0 V to 0.8 V on VSENSE pin.
PAGE 11
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 APPLICATION INFORMATION L1 10 mH C4 0.1 mF C1 4.7 mF C2 4.7 mF C3 0.01 mF C8 47 mF R1 332 kW C9 47 mF R6 3.24 kW C6 1000 pF C5 0.015 mF R2 68.1 kW R3 29.4 kW R5 10.2 kW C7 47 pF Figure 12. Typical Application Schematic STEP BY STEP DESIGN PROCEDURE The following design procedure can be used to select component values for the TPS54231. Alternately, the SwitcherPro™Software may be used to generate a complete design.
PAGE 12
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com OUTPUT VOLTAGE SET POINT The output voltage of the TPS54231 is externally adjustable using a resistor divider network. In the application circuit of Figure 12, this divider network is comprised of R5 and R6. The relationship of the output voltage to the resistor divider is given by Equation 4 and Equation 5: R5 ´ VREF R6 = VOUT - VREF (4) é R5 ù VOUT = VREF ´ ê +1ú ë R6 û (5) Choose R5 to be approximately 10 kΩ.
PAGE 13
TPS54231 www.ti.com LMIN = SLUS851C – OCTOBER 2008 – REVISED JULY 2012 VOUT(MAX) ´ (VIN(MAX) - VOUT ) VIN(MAX) ´ KIND ´ IOUT ´ FSW (8) KIND is a coefficient that represents the amount of inductor ripple current relative to the maximum output current. This value is at the discretion of the designer; however, the following guidelines may be used. For designs using low ESR output capacitors such as ceramics, a value as high as KIND = 0.3 may be used. When using higher ESR output capacitors, KIND = 0.
PAGE 14
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com RESR = Equivalent series resistance of the output capacitors The peak-to-peak output voltage ripple consists of two terms. The first term is due to the ac ripple current (ILPP) charging and discharging the output capacitance in each switching cycle and the second term is due to the ac ripple current in the ESR of the output capacitor. These two terms maybe out of phase and may add or subtract depending on the duty cycle.
PAGE 15
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 Where: RSENSE = 1Ω/9 FCO = Closed-loop crossover frequency CO = Output capacitance The phase loss is given by Equation 20: PL = a tan (2 ´ p ´ FCO ´ RESR ´ CO ) - a tan (2 ´ p ´ FCO ´ R O ´ C O ) - 10 (20) Where: RESR = Equivalent series resistance of the output capacitor RO = VO/IO Now that the phase loss is known the required amount of phase boost to meet the phase margin requirement can be determined.
PAGE 16
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com For this design, the two 47-μF output capacitors are used. For ceramic capacitors, the actual output capacitance is less than the rated value when the capacitors have a dc bias voltage applied. This is the case in a dc/dc converter. The actual output capacitance may be as low as 41 μF. The combined ESR is approximately 0.002 Ω. The desired cross over frequency is 25 kHz.
PAGE 17
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 OUTPUT VOLTAGE LIMITATIONS Due to the internal design of the TPS54231, there are both upper and lower output voltage limits for any given input voltage. The upper limit of the output voltage set point is constrained by the maximum duty cycle of 91% and is given by Equation 31: VOmax = 0.
PAGE 18
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com Where: Ptot is the total device power dissipation (W). TA is the ambient temperature (°C). TJ is the junction temperature (°C) . Rth is the thermal resistance of the package (°C/W). TJMAX is maximum junction temperature (°C). TAMAX is maximum ambient temperature (°C). PCB LAYOUT The VIN pin should be bypassed to ground with a low ESR ceramic bypass capacitor.
PAGE 19
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 OUTPUT FILTER CAPACITOR TOPSIDE GROUND AREA Route BOOT CAPACITOR trace on other layer to provide wide path for topside ground Vout Feedback Trace OUTPUT INDUCTOR CATCH DIODE PH INPUT BYPASS CAPACITOR BOOT Vin UVLO RESISTOR DIVIDER VIN GND EN COMP SS VSENSE SLOW START CAPACITOR Thermal VIA BOOT CAPACITOR PH COMPENSATION NETWORK RESISTOR DIVIDER Signal VIA Figure 13.
PAGE 20
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com 100 100 90 90 80 80 Efficiency - % 70 VIN = 28 V 60 VIN = 7 V 70 Efficiency - % VIN = 15 V VIN = 24 V 50 40 60 VIN = 7 V VIN = 24 V 50 40 30 30 20 20 10 10 0 0 0 0.25 0.5 0.75 1 1.25 IO - Output Current - A 1.5 1.75 0 2 Figure 14. TPS54231 Efficiency 0.02 0.04 0.06 0.08 0.1 0.12 0.14 IO - Output Current - A 0.16 0.18 0.2 Figure 15. TPS54231 Low Current Efficiency 0.2 0.15 0.15 0.1 IO = 0 A IO = 1 A 0.
PAGE 21
TPS54231 www.ti.com SLUS851C – OCTOBER 2008 – REVISED JULY 2012 Vout Vin PI PI Figure 20. TPS54231 Output Ripple Figure 21. TPS54231 Input Ripple Vin Vout Figure 22. TPS54231 Start Up Figure 23. TPS54231 Start-up Relative to Enable Vout PH Figure 24.
PAGE 22
TPS54231 SLUS851C – OCTOBER 2008 – REVISED JULY 2012 www.ti.com REVISION HISTORY NOTE: Page numbers and equation reference numbers of current version may differ from previous versions. Changes from Original (October 2008) to Revision A Page • Added a new table to the Description - For additional design needs ................................................................................... 2 • Changed the ABSOLUTE MAXIMUM RATINGS table, Input Voltage - EN pin max value From: 5V to 6V ...............
PAGE 23
PACKAGE OPTION ADDENDUM www.ti.
PAGE 24
PACKAGE OPTION ADDENDUM www.ti.com 10-Nov-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 25
PAGE 26
PAGE 27
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.