Datasheet
( )
( ) ( )
( )
SS ref
SS
SS
C nF V V
T ms =
I A
´
m
TPS54231
www.ti.com
SLUS851C –OCTOBER 2008–REVISED JULY 2012
PROGRAMMABLE SLOW START USING SS PIN
It is highly recommended to program the slow start time externally because no slow start time is implemented
internally. The TPS54231 effectively uses the lower voltage of the internal voltage reference or the SS pin
voltage as the power supply’s reference voltage fed into the error amplifier and will regulate the output
accordingly. A capacitor (C
SS
) on the SS pin to ground implements a slow start time. The TPS54231 has an
internal pull-up current source of 2 μA that charges the external slow start capacitor. The equation for the slow
start time (10% to 90%) is shown in Equation 3 . The V
ref
is 0.8V and the I
SS
current is 2 μA.
(3)
The slow start time should be set between 1ms to 10ms to ensure good start-up behavior. The slow start
capacitor should be no more than 27 nF.
If during normal operation, the input voltage drops below the VIN UVLO threshold, or the EN pin is pulled below
1.25 V, or a thermal shutdown event occurs, the TPS54231 stops switching.
ERROR AMPLIFIER
The TPS54231 has a transconductance amplifier for the error amplifier. The error amplifier compares the
VSENSE voltage to the internal effective voltage reference presented at the input of the error amplifier. The
transconductance of the error amplifier is 92 μA/V during normal operation. Frequency compensation
components are connected between the COMP pin and ground.
SLOPE COMPENSATION
In order to prevent the sub-harmonic oscillations when operating the device at duty cycles greater than 50%, the
TPS54231 adds a built-in slope compensation which is a compensating ramp to the switch current signal.
CURRENT MODE COMPENSATION DESIGN
To simplify design efforts using the TPS54231, the typical designs for common applications are listed in Table 1.
For designs using ceramic output capacitors, proper derating of ceramic output capacitance is recommended
when doing the stability analysis. This is because the actual ceramic capacitance drops considerably from the
nominal value when the applied voltage increases. Advanced users may refer to the Step by Step Design
Procedure in the Application Information section for the detailed guidelines or use SwitcherPro™ Software tool
(http://focus.ti.com/docs/toolsw/folders/print/switcherpro.html).
Table 1. Typical Designs (Referring to Simplified Schematic on page 1)
VIN V
OUT
F
sw
L
o
C
o
R
O1
R
O2
C
2
C
1
R
3
(V) (V) (kHz) (μH) (kΩ) (kΩ) (pF) (pF) (kΩ)
12 5 570 15 Ceramic 33 μF 10 1.91 47 1800 21
12 3.3 570 10 Ceramic 47μF 10 3.24 47 4700 21
12 1.8 570 6.8 Ceramic 100 μF 10 8.06 47 4700 21
12 0.9 570 4.7 Ceramic 100 μFx2 10 80.6 47 4700 21
12 5 570 15 Aluminum 330 μF/160 mΩ 10 1.91 47 220 40.2
12 3.3 570 10 Aluminum 470 μF/160 mΩ 10 3.24 47 220 21
12 1.8 570 6.8 SP 100 μF/15 mΩ 10 8.06 47 4700 40.2
12 0.9 570 4.7 SP 220 μF/12 mΩ 10 80.6 47 4700 40.2
OVERCURRENT PROTECTION AND FREQUENCY SHIFT
The TPS54231 implements current mode control that uses the COMP pin voltage to turn off the high-side
MOSFET on a cycle by cycle basis. Every cycle the switch current and the COMP pin voltage are compared;
when the peak inductor current intersects the COMP pin voltage, the high-side switch is turned off. During
overcurrent conditions that pull the output voltage low, the error amplifier responds by driving the COMP pin high,
causing the switch current to increase. The COMP pin has a maximum clamp internally, which limit the output
current.
Copyright © 2008–2012, Texas Instruments Incorporated 9