Datasheet

PIN ASSIGNMENTS
1
2
3
4
5
6
7
8
ENA
GND
VIN
PH
VSENSE
NC
NC
BOOT
D PACKAGE
(TOP VIEW)
TPS5420-Q1
SLVS752B – NOVEMBER 2007 – REVISED JUNE 2008 ................................................................................................................................................... www.ti.com
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME NO.
BOOT 1 Boost capacitor for the high-side FET gate driver. Connect 0.01- µ F low ESR capacitor from BOOT pin to PH pin.
NC 2, 3 Not connected internally
VSENSE 4 Feedback voltage for the regulator. Connect to output voltage divider.
ENA 5 On/off control. Below 0.5 V, the device stops switching. Float the pin to enable.
GND 6 Ground
Input supply voltage. Bypass VIN pin to GND pin close to device package with a high-quality low-ESR ceramic
VIN 7
capacitor.
PH 8 Source of the high-side power MOSFET. Connected to external inductor and diode.
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Product Folder Link(s): TPS5420-Q1