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R2 +
R1 1.221
V
OUT
* 1.221
(12)
+
10V-21V
L1
27 Hm
GND
VSNS
NC
NC
ENA
BOOT
PH
D1
B340A
C2
0.01 Fm
R2
3.24kW
R1
10kW
VIN
C1
10 Fm
U1
TPS5420D
TP5
5V
7
1
5
8
2
4
3
6
VOUT
VIN
ENA
C3
100 Fm
(SeeNote A)
TPS5420-EP
SLVS717 – DECEMBER 2006
For this design example, a single 100- µ F output capacitor is chosen for C3. The calculated RMS ripple current is
143 mA, and the maximum ESR required is 88 m Ω . A capacitor that meets these requirements is an AVX
TPSD107M010R0080, rated at 10 V, with a maximum ESR of 80 m Ω and a ripple current rating of 1.369 A. This
capacitor results in a peak-to-peak output ripple of 26 mV using Equation 10. An additional small 0.1- µ F ceramic
bypass capacitor may also used, but is not included in this design.
Other capacitor types can be used with the TPS5420, depending on the needs of the application.
Output Voltage Setpoint
The output voltage of the TPS5420 is set by a resistor divider (R1 and R2) from the output to the VSENSE pin.
Calculate the R2 resistor value for the output voltage of 5 V using Equation 12 :
For any TPS5420 design, start with an R1 value of 10 k Ω . R2 is then 3.24 k Ω .
Boot Capacitor
The boot capacitor should be 0.01 µ F.
Catch Diode
The TPS5420 is designed to operate using an external catch diode between PH and GND. The selected diode
must meet the absolute maximum ratings for the application—reverse voltage must be higher than the maximum
voltage at the PH pin, which is VINMAX + 0.5 V. Peak current must be greater than IOUTMAX plus one-half the
peak-to-peak inductor current. Forward voltage drop should be small for higher efficiencies. It is important to
note that the catch diode conduction time is typically longer than the high-side FET on time; therefore, the diode
parameters improve the overall efficiency. Additionally, check that the device chosen is capable of dissipating
the power losses. For this design, a Diodes, Inc. B340A is chosen, with a reverse voltage of 40 V, forward
current of 3 A, and a forward voltage drop of 0.5 V.
Additional Circuits
Figure 12 shows an application circuit using a wide input voltage range. The design parameters are similar to
those given for the design example, with a larger-value output inductor and a lower closed-loop crossover
frequency.
A. C3 = Tantalum AVX TPSD107M010R0080
Figure 12. 10-V — 21-V Input to 5-V Output Application Circuit
14
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