Datasheet

BOOT
VIN
PVIN
EN
RT/CLK
SS
COMP
GND
TPS54120
PH
LDOIN
LDOEN VSENSE
OUT
FB
NR
R3
2.2 kW
C1
0.047 Fm
C2
330 pF
C
SS
0.01 Fm
R
100 k
RT
W
ON/OFF
V
12 V
IN
C
NR
0.1 Fm
R5
10 kW
R4
30.9 kW
C
OUT
10 Fm
C
BOOT
0.1 Fm
L1
22 Hm
C
DC-DC_OUT
47 Fm
R1
41.2 kW
R2
10 kW
V
3.3 V
(OUT)
DC-DC_OUT
C
FF
0.1 Fm
TPS54120
SBVS180C –JANUARY 2012–REVISED JUNE 2012 www.ti.com
DETAILED DESCRIPTION
TYPICAL APPLICATION
Figure 28 shows a typical application diagram for the TPS54120.
Figure 28. Typical Application
OVERVIEW
The TPS54120 is a low-noise power supply that delivers a quiet power rail to noise-sensitive components. This
device combines a current mode-controlled, dc-dc step-down (buck) regulator and a low-noise, wide-bandwidth
low dropout (LDO) regulator to create an efficient, stable, low-noise power supply. The TPS54120 is fully
characterized for noise performance, thus allowing for easy creation of a quiet power supply. The device includes
features such as soft-start, clock synchronization, and a power-good signal, making it well suited as a power
supply for communication, test and measurement, and audio equipment applications. Both the integrated
switching regulator and LDO are fully configurable, allowing for complete design flexibility. In addition, a
simplified design procedure enables quick development of a power supply custom-suited to specific
requirements.
INPUT VOLTAGE RANGE
VIN AND POWER VIN (PVIN)
The TPS54120 allows for a variety of applications by using the VIN and PVIN pins together or separately. The
VIN pin voltage supplies the internal control circuits of the switching regulator. The PVIN pin voltage provides the
input voltage to the power converter system of the switching regulator.
If tied together, the input voltage for VIN and PVIN can range from 4.5 V to 17 V. If using the VIN separately from
PVIN, the VIN pin must be between 4.5 V and 17 V, and the PVIN pin can range from as low as 1.6 V to 17 V. A
voltage divider connected to the EN pin can adjust either input voltage UVLO appropriately. Adjusting the input
voltage UVLO on the PVIN pin helps to provide consistent power up behavior; refer to the Device Enable and
Undervoltage Lockout Adjustment section for more information.
LDO INPUT VOLTAGE (LDOIN)
The minimum input voltage that can be applied to the LDO of the TPS54120 is LDOVIN = (VOUT + VDO) or 2.2
V, whichever is greater. The maximum rated voltage into this pin should not exceed 6.5 V. This pin is designed
to be connected to the output inductor of the integrated switcher, and should be decoupled to the GND pin with a
1.0 µF ceramic capacitor.
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