Datasheet

Minimum Recommended Exposed
Copper Area For Powerpad. 5mm
Stencils may Require 10 Percent
Larger Area
0.2454
0.0150
0.06
0.0256
0.1700
0.1340
0.0620
0.0400
0.0400
0.0400
0.0600
0.0227
0.0600
0.1010
6 PL ∅ 0.0130
4 PL ∅ 0.0180
Connect Pin 1 to Analog Ground Plane
in This Area for Optimum Performance
Minimum Recommended Top
Side Analog Ground Area
Minimum Recommended Thermal Vias: 6 × .013 dia.
Inside Powerpad Area 4 × .018 dia. Under Device as Shown.
Additional .018 dia. Vias May be Used if Top Side Analog
Ground Area is Extended.
0.2560
TPS54110
www.ti.com SLVS500C –DECEMBER 2003– REVISED FEBRUARY 2011
Figure 10. Recommended Land Pattern for 20-Pin PWP PowerPAD
Layout Considerations for Thermal Performance
For operation at full rated load current, the analog ground plane must provide adequate heat dissipation area. A
3-inch-by-3-inch plane of 1-ounce copper is recommended, though not mandatory, depending on ambient
temperature and airflow. Most applications have larger areas of internal ground plane available. Connect the
PowerPAD to the largest area available. Additional areas on the top or bottom layers also help dissipate heat.
Use any area available when 1.5-A or greater operation is desired. Connect the exposed area of the PowerPAD
to the analog ground-plane layer with 0.013-inch-diameter vias to avoid solder wicking through the vias. An
adequate design includes six vias in the PowerPAD area with four additional vias located under the device
package. The size of the vias under the package, but not in the exposed thermal pad area, can be increased to
0.018. Additional vias in areas not under the device package enhance thermal performance.
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