E User’s Guide December 2003 PMP Systems Power SLVU102
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input and output voltage ranges specified in the EVM User’s Guide. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
How to Use This Manual Preface About This Manual This user’s guide describes the characteristics, operation, and the use of the TPS54110EVM−044 evaluation module. It covers all pertinent areas involved to properly use this EVM board along with the devices that it supports. The physical PCB layout, schematic diagram, and bill of materials are included.
Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Performance Specification Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Modifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents 2−1 2−2 2−3 2−4 2−5 2−6 2−7 2−8 2−9 2−10 2−11 3−1 3−2 3−3 4−1 Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Measured Efficiency, TPS54110 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Measured Circuit Losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Load Regulation . . . . . . . . .
Chapter 1 This chapter contains background information for the TPS54110 with support documentation for the TPS54110EVM-044 evaluation module (HPA044). The TPS54110EVM-044 performance specifications are provided, along with a schematic and bill of material. Topic Page 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Performance Specification Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.
Background 1.1 Background The TPS54110 dc/dc converter is designed to provide up to 1.5-A output from a 3-V to 6-V input voltage source. Rated input voltage and output current range is given in Table 1−1. This evaluation module is designed to demonstrate the small PCB areas that may be achieved when designing with the TPS54110 regulator, and does not reflect the high efficiencies that may be achieved when designing with this part.
Performance Specification Summary 1.2 Performance Specification Summary A summary of the TPS54110EVM-044 performance specifications is provided in Table 1−2. Specifications are given for an input voltage of 3.3 V and an output voltage of 1.5 V unless otherwise specified. The ambient temperature is 25_C for all measurements, unless otherwise noted. The maximum input voltage for the TPS54110 is 6 V. Table 1−2.
Modifications 1.3 Modifications The TPS54110EVM−044 is designed to demonstrate the small size that can be attained when designing with the TPS54110; therefore, many of the features, which allow for extensive modifications, have been omitted from this EVM. For reference designators, see the schematic in Figure 4−1. 1.3.1 Output Voltage Set Point Changing the value of R2 can change the output voltage in the range of 0.9 V to 3.3 V.
Chapter 2 This chapter describes how to properly connect, set up, and use the TPS54110EVM−044 evaluation module. The chapter also includes test results typical for the TPS54110EVM−044 and covers efficiency, output voltage regulation, load transients, loop response, output ripple, input ripple, and startup. Topic Page 2.1 Input/Output Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 Efficiency . . . . . . . . . . . . . . . . . . . . . . .
Input/Output Connections 2.1 Input/Output Connections The TPS54110EVM−44 has the following two input/output connectors: VI (J1), and VO (J2). A diagram showing the connection points is shown in Figure 2−1. A power supply capable of supplying 3 A should be connected to J1 through a pair of 20 awg wires. The load should be connected to J2 through a pair of 20 awg wires. The maximum load current capability should be 1.5 A. Wire lengths should be minimized to reduce losses in the wires.
Efficiency 2.2 Efficiency The TPS54110EVM−44 efficiency peaks at load current of about 0.5 A to 0.75 A, and then decreases as the load current increases towards full load. Figure 2−2 shows the efficiency for the TPS54110 at an ambient temperature of 25_C. The efficiency is lower at higher ambient temperatures, due to temperature variation in the drain-to-source resistance of the MOSFETs.
Power Dissipation 2.3 Power Dissipation The low junction-to-case thermal resistance of the PWP package, along with a good board layout, allows the TPS54110EVM−044 EVMs to output full-rated load current while maintaining safe junction temperatures. With a 3.3-V input source and a 1.5-A load, the junction temperature is approximately 60°C wheras the case temperature is approximately 55°C. The total circuit losses at 25°C are shown in Figure 2−3. Power dissipation is shown for input voltages of 3.
Output Voltage Regulation 2.4 Output Voltage Regulation The output voltage load regulation of the TPS54110EVM−044 is shown in Figure 2−4; the output voltage line regulation is shown in Figure 2−5. Measurements are given for an ambient temperature of 25°C. Figure 2−4. Load Regulation OUTPUT VOLTAGE vs OUTPUT CURRENT 0.1 VO − Output Voltage Change − % 0.08 0.06 0.04 0.02 VI = 3.3 V 0 −0.02 −0.04 VI = 5 V −0.06 −0.08 −0.1 0 0.25 0.5 0.75 1 IO − Output Current − A 1.25 1.5 Figure 2−5.
Load Transients 2.5 Load Transients The TPS54110EVM−044 response to load transients is shown in Figure 2−6. The current step is from 25% to 75% of maximum rated load. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output. Figure 2−6. Load Transient Response, TPS54110 VO (AC) 20 mV/div IO 0.
Loop Characteristic 2.6 Loop Characteristic The TPS54110EVM−044 loop response characteristics are shown in Figure 2−7 and Figure 2−8. Gain and phase plots are shown for each device at minimum and maximum operating voltage. Figure 2−7. Measured Loop Response, TPS54110, VI = 3 V MEASURED LOOP RESPONSE 60 180 150 Phase 40 120 30 90 20 60 10 30 Gain 0 0 −10 −30 −20 −60 −30 −90 −40 −120 −50 −60 100 −150 Phase − deg Gain − dB 50 −180 1k 10 k 100 k f − Frequency − Hz 1M Figure 2−8.
Output Voltage Ripple 2.7 Output Voltage Ripple The TPS54110EVM−044 output voltage ripple is shown in Figure 2−9. The input voltage is 3.3 V for the TPS54110. Output current is the rated full load of 1.5 A. Voltage is measured directly across output capacitors. Figure 2−9. Measured Output Voltage Ripple, TPS54110 VO (AC) 20 mV/div Vphase 5 V/div t − Time − 500 ns/div 2.8 Input Voltage Ripple The TPS54110EVM−044 input voltage ripple is shown in Figure 2−10. The input voltage is 3.3 V for the TPS54110.
Powering Up 2.9 Powering Up The TPS54110 regulator provides an internal slow-start circuit to ramp the output voltage up at a steady rate. When the input voltage reches the UVLO start up threshold, the output begins to ramp up at the internally set rate until the final output set point is reached. The output voltage waveforms during power up do not depend on load currents. Longer delay and ramp times can be programmed using an external slow-start capacitor in the C5 location.
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Chapter 3 This chapter provides a description of the TPS54110EVM−044 board layout and layer illustrations. Topic 3.1 Page Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Layout 3.1 Layout The board layout for the TPS54110EVM−044 is shown in Figure 3−1 through Figure 3−3. The top side layer of the TPS54110EVM−044 is laid out in a manner typical of a user application that is optimized for small size. A small footprint Coilcraft DO3314−103MX inductor and 0805 10-µF ceramic capacitor are used in the output filter. 0402 case size components are used when possible to further reduce circuit area. The top and bottom layers are 1.5-oz. copper.
Layout Figure 3−2. Bottom Side Layout Figure 3−3.
Chapter 4 The TPS54110EVM−044 schematic and bill of materials are presented in this chapter. Topic Page 4.1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 4.2 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Schematic 4.1 Schematic The schematic for the TPS54110EVM−044 is shown in Figure 4−1. Figure 4−1. TPS54110EVM-044 Schematic TP1 J1 VIN GND TP6 PWRGD R7 10 k VIN C8 560 pF 2 + 1 TP2 C5 OPEN C1 OPEN R4 71.5 k C4 C9 0.1 F 10 F U1 TPS54110PWP 20 AGND RT 19 SYNC VSENSE 18 SS/ENA COMP 17 VBIAS PWRGD 16 BOOT VIN 15 PH VIN 14 PH VIN 13 PH PGND 12 PH PGND 11 PH PGND PwrPd 1 2 3 4 5 6 7 8 9 10 21 R3 1.74 k C7 47 pF R2 14.7 k R1 10 k TP5 C3 0.
Bill of Materials 4.2 Bill of Materials The bill of materials for the TPS54110EVM−044 is given by Table 4−1. TPS54110EVM-044 Bill of Materials Count Ref Des Description Size MFR Part Number − C1 Capacitor, POSCAP, xx µF, xx V, 20% 7343 (D) Sanyo Optional − C10 Capacitor, ceramic, xx µF, 6.3 V, X5R, 20% 805 std std 2 C2, C9 Capacitor, ceramic, 10 µF, 6.3 V, X5R, 20% 805 std std 1 C3 Capacitor, 0.047 µF, 25 V, X7R 402 std std 1 C4 Capacitor, 0.
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