Datasheet

O
IN
IN SW
I
0.25
C
V ripple f
æ ö
³ ´
ç ÷
è ø
( )
IN OUT
OUT
IN OUT
IN IN
V min V
V
IC rms = I
V min V Min
-
´ ´
RIPPLE
C
RIPPLE
V
R
I
£
O
O
SW
I
2
C 3
V f
³
D
( )
( )
2 2
O
O O
2
2
O O
I 0
C 2 L
V + V V
-
³ ´
D -
TPS54062
www.ti.com SLVSAV1B –MAY 2011–REVISED AUGUST 2012
(13)
(14)
(15)
Input capacitor
The TPS54062 requires a high quality ceramic, type X5R or X7R, input decoupling capacitor of at least 1µF of
effective capacitance and in some applications a bulk capacitance. The effective capacitance includes any dc
bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage. The
capacitor must also have a rms current rating greater than the maximum rms input current of the TPS54062. The
input rms current can be calculated using Equation 16. The value of a ceramic capacitor varies significantly over
temperature and the amount of dc bias applied to the capacitor. The capacitance variations due to temperature
can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic
dielectrics are usually selected for power regulator capacitors because they have a high capacitance to volume
ratio and are fairly stable over temperature. The output capacitor must also be selected with the dc bias taken
into account. The capacitance value of a capacitor decreases as the dc bias across a capacitor increases. For
this example design, a ceramic capacitor with at least a 100 V voltage rating is required to support the maximum
input voltage. The input capacitance value determines the input ripple voltage of the regulator. The input voltage
ripple can be calculated using rearranging Equation 17.
Using the design example values, Ioutmax = 50 mA, C
IN
= 2.2 µF, ƒ
SW
= 400 kHz, yields an input voltage ripple
of 14.2 mV and a rms input ripple current of 24.6 mA.
(16)
(17)
Bootstrap Capacitor Selection
A 0.01-µF ceramic capacitor must be connected between the BOOT and PH pins for proper operation. It is
recommended to use a ceramic capacitor with X5R or better grade dielectric. The capacitor should have a 10V
or higher voltage rating.
Under Voltage Lock Out Set Point
The Under Voltage Lock Out (UVLO) can be adjusted using an external voltage divider on the EN pin of the
TPS54062. The UVLO has two thresholds, one for power up when the input voltage is rising and one for power
down or brown outs when the input voltage is falling. For the example design, the supply should turn on and start
switching once the input voltage increases above 7.88 V (enabled). After the regulator starts switching, it should
continue to do so until the input voltage falls below 6.66 V (UVLO stop). The programmable UVLO and enable
voltages are set using a resistor divider between Vin and ground to the EN pin. Equation 2 through Equation 3
can be used to calculate the resistance values necessary. For the example application, a 174 kΩ resistor
between Vin and EN and a 31.6 kΩ resistor between EN and ground are required to produce the 7.88 and 6.66
volt start and stop voltages.
Output Voltage and Feedback Resistors Selection
For the example design, 10 kΩ was selected for R
LS
. Using Equation 1, R
HS
is calculated as 31.25 kΩ. The
nearest standard 1% resistor is 31.6 kΩ.
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Product Folder Link(s): TPS54062