Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- THERMAL INFORMATION
- ELECTRICAL CHARACTERISTICS
- DEVICE INFORMATION
- TYPICAL CHARACTERISTICS
- OVERVIEW
- DETAILED DESCRIPTION
- Fixed Frequency PWM Control
- Slope Compensation Output Current
- Pulse Skip Eco-Mode
- Low Dropout Operation and Bootstrap Voltage (BOOT)
- Error Amplifier
- Voltage Reference
- Adjusting the Output Voltage
- Enable and Adjusting Undervoltage Lockout
- Slow Start/Tracking Pin (SS/TR)
- Overload Recovery Circuit
- Sequencing
- Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
- Overcurrent Protection and Frequency Shift
- Selecting the Switching Frequency
- How to Interface to RT/CLK Pin
- Power Good (PWRGD Pin)
- Overvoltage Transient Protection
- Thermal Shutdown
- Small Signal Model for Loop Response
- Simple Small Signal Model for Peak Current Mode Control
- Small Signal Model for Frequency Compensation
- APPLICATION INFORMATION
- Design Guide — Step-By-Step Design Procedure
- Selecting the Switching Frequency
- Output Inductor Selection (LO)
- Output Capacitor
- Catch Diode
- Input Capacitor
- Slow Start Capacitor
- Bootstrap Capacitor Selection
- Under Voltage Lock Out Set Point
- Output Voltage and Feedback Resistors Selection
- Compensation
- Discontinuous Mode and Eco Mode Boundary
- APPLICATION CURVES
- Power Dissipation Estimate
- Layout
- Revision History

TPS54060
SLVS919A –JANUARY 2009–REVISED JULY 2010
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
T
J
= –40°C to 150°C, VIN = 3.5 to 60V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CURRENT LIMIT
Current limit threshold VIN = 12 V, T
J
= 25°C 0.6 0.94 A
THERMAL SHUTDOWN
Thermal shutdown 182 °C
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
Switching Frequency Range using
100 2500 kHz
RT mode
f
SW
Switching frequency R
T
= 200 kΩ 450 581 720 kHz
Switching Frequency Range using
300 2200 kHz
CLK mode
Minimum CLK input pulse width 40 ns
RT/CLK high threshold 1.9 2.2 V
RT/CLK low threshold 0.5 0.7 V
RT/CLK falling edge to PH rising
Measured at 500 kHz with RT resistor in series 60 ns
edge delay
PLL lock in time Measured at 500 kHz 100 ms
SLOW START AND TRACKING (SS/TR)
Charge current V
SS/TR
= 0.4 V 2 mA
SS/TR-to-VSENSE matching V
SS/TR
= 0.4 V 45 mV
SS/TR-to-reference crossover 98% nominal 1.0 V
SS/TR discharge current (overload) VSENSE = 0 V, V(SS/TR) = 0.4 V 112 mA
SS/TR discharge voltage VSENSE = 0 V 54 mV
POWER GOOD (PWRGD PIN)
VSENSE falling 92%
VSENSE rising 94%
V
VSENSE
VSENSE threshold
VSENSE rising 109%
VSENSE falling 107%
Hysteresis VSENSE falling 2%
Output high leakage VSENSE = VREF, V(PWRGD) = 5.5 V, 25°C 10 nA
On resistance I(PWRGD) = 3 mA, VSENSE < 0.79 V 50 Ω
Minimum VIN for defined output V(PWRGD) < 0.5 V, II(PWRGD) = 100 mA 0.95 1.5 V
4 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS54060