Datasheet

2 Iout
Cout >
sw Vout
´ D
¦ ´ D
( )
( )
2
2 2
2
Ioh Iol
Cout > Lo
V Vi
-
´
¦ -
1 1
ORIPPLE
RIPPLE
Cout >
V
8 sw
I
´
´ ¦
TPS54060
www.ti.com SLVS919A –JANUARY 2009–REVISED JULY 2010
to see the change in load current and output voltage and adjust the duty cycle to react to the change. The output
capacitor must be sized to supply the extra current to the load until the control loop responds to the load change.
The output capacitance must be large enough to supply the difference in current for 2 clock cycles while only
allowing a tolerable amount of droop in the output voltage. Equation 32 shows the minimum output capacitance
necessary to accomplish this.
Where ΔIout is the change in output current, ƒsw is the regulators switching frequency and ΔVout is the
allowable change in the output voltage. For this example, the transient load response is specified as a 4%
change in Vout for a load step from 0A (no load) to 0.5 A (full load). For this example, ΔIout = 0.5-0 = 0.5 A and
ΔVout = 0.04 × 3.3 = 0.132 V. Using these numbers gives a minimum capacitance of 15.2mF. This value does
not take the ESR of the output capacitor into account in the output voltage change. For ceramic capacitors, the
ESR is usually small enough to ignore in this calculation. Aluminum electrolytic and tantalum capacitors have
higher ESR that should be taken into account.
The catch diode of the regulator can not sink current so any stored energy in the inductor will produce an output
voltage overshoot when the load current rapidly decreases, see Figure 51. The output capacitor must also be
sized to absorb energy stored in the inductor when transitioning from a high load current to a lower load current.
The excess energy that gets stored in the output capacitor will increase the voltage on the capacitor. The
capacitor must be sized to maintain the desired output voltage during these transient periods. Equation 33 is
used to calculate the minimum capacitance to keep the output voltage overshoot to a desired value. Where L is
the value of the inductor, I
OH
is the output current under heavy load, I
OL
is the output under light load, VF is the
final peak output voltage, and Vi is the initial capacitor voltage. For this example, the worst case load step will be
from 0.5 A to 0 A. The output voltage will increase during this load transition and the stated maximum in our
specification is 4% of the output voltage. This will make Vf = 1.04 × 3.3 = 3.432. Vi is the initial capacitor voltage
which is the nominal output voltage of 3.3 V. Using these numbers in Equation 33 yields a minimum capacitance
of 13.2mF.
Equation 34 calculates the minimum output capacitance needed to meet the output voltage ripple specification.
Where fsw is the switching frequency, V
oripple
is the maximum allowable output voltage ripple, and I
ripple
is the
inductor ripple current. Equation 34 yields 1mF.
Equation 35 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple
specification. Equation 35 indicates the ESR should be less than 248mΩ.
The most stringent criteria for the output capacitor is 15.2mF of capacitance to keep the output voltage in
regulation during an load transient.
Additional capacitance de-ratings for aging, temperature and dc bias should be factored in which will increase
this minimum value. For this example, a 47 mF 10V X5R ceramic capacitor with 5 mΩ of ESR will be used.
Capacitors generally have limits to the amount of ripple current they can handle without failing or producing
excess heat. An output capacitor that can support the inductor ripple current must be specified. Some capacitor
data sheets specify the Root Mean Square (RMS) value of the maximum ripple current. Equation 36 can be used
to calculate the RMS ripple current the output capacitor needs to support. For this application, Equation 36 yields
37.7 mA.
(32)
(33)
(34)
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