Datasheet

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Thermal
Pad
(11)
BOOT
VIN
EN
PH
GND
COMP
VSENSE
PWRGD
SS/TR
RT/CLK
MSOP10
(TOP VIEW)
TPS5401
www.ti.com SLVSAB0 –DECEMBER 2010
DEVICE INFORMATION
PIN CONFIGURATION
PIN FUNCTIONS
PIN
I/O DESCRIPTION
NAME NO.
A bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor is below the
BOOT 1 O
minimum required by the output device, the output is forced to switch off until the capacitor is refreshed.
Error amplifier output, and input to the output switch current comparator. Connect frequency compensation
COMP 8 O
components to this pin.
Enable pin, internal pullup current source. Pull below 1.2 V to disable. Float to enable. Adjust the input
EN 3 I
undervoltage lockout with two resistors.
GND 9 – Ground
PH 10 I The source of the internal high-side power MOSFET
An open-drain output; asserts low if output voltage is low due to thermal shutdown, dropout, overvoltage or
PWRGD 6 O
EN shutdown.
Resistor timing and external clock. An internal amplifier holds this pin at a fixed voltage when using an
external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold,
RT/CLK 5 I a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and
the pin is a high-impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is
re-enabled and the mode returns to a resistor-set function.
Slow-start and tracking. An external capacitor connected to this pin sets the output rise time. Because the
SS/TR 4 I
voltage on this pin overrides the internal reference, it can be used for tracking and sequencing.
Thermal pad (11) – GND pin must be electrically connected to the thermal pad on the printed circuit board for proper operation.
VIN 2 I Input supply voltage, 3.5 V to 42 V.
VSENSE 7 I Inverting node of the transconductance (gm) error amplifier.
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