Datasheet

TPS5401
SLVSAB0 –DECEMBER 2010 www.ti.com
DETAILED DESCRIPTION (continued)
Power Good (PWRGD Pin)
The PWRGD pin is an open-drain output. Once the VSENSE pin is between 94% and 107% of the internal
voltage reference, the PWRGD pin is de-asserted and the pin floats. It is recommended to use a pullup resistor
between the values of 10 kΩ and 100 kΩ to a voltage source that is 5.5 V or less. PWRGD is in a defined state
once the VIN input voltage is greater than 1.5 V, but with reduced current-sinking capability. PWRGD achieves
full current-sinking capability as the VIN input voltage approaches 3 V.
The PWRGD pin is pulled low when VSENSE is lower than 92% or greater than 109% of the nominal internal
reference voltage. Also, PWRGD is pulled low if the UVLO or thermal shutdown is asserted or the EN pin is
pulled low.
Overvoltage Transient Protection
The TPS5401 incorporates an overvoltage transient protection (OVTP) circuit to minimize voltage overshoot
when recovering from output fault conditions or strong unload transients on power-supply designs with low-value
output capacitance. For example, when the power-supply output is overloaded, the error amplifier compares the
actual output voltage to the internal reference voltage. If the VSENSE pin voltage is lower than the internal
reference voltage for a considerable time, the output of the error amplifier responds by clamping the
error-amplifier output to a high voltage, thus requesting the maximum output current. Once the condition is
removed, the regulator output rises and the error amplifier output transitions to the steady-state duty cycle. In
some applications, the power-supply output voltage can respond faster than the error-amplifier output can
respond; this actuality leads to the possibility of an output overshoot. The OVTP feature minimizes the output
overshoot, when using a low-value output capacitor, by implementing a circuit to compare the VSENSE pin
voltage to OVTP threshold, which is 109% of the internal voltage reference. If the VSENSE pin voltage is greater
than the OVTP threshold, the high-side MOSFET is disabled, preventing current from flowing to the output and
minimizing output overshoot. When the VSENSE voltage drops lower than the OVTP threshold, the high-side
MOSFET is allowed to turn on at the next clock cycle.
Thermal Shutdown
The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 182°C.
The thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal
trip threshold. Once the die temperature decreases below 182°C, the device reinitiates the power-up sequence
by discharging the SS/TR pin.
Current-Mode Compensation Design
To simplify design efforts using the TPS5401, the typical designs for common applications are listed in Table 2.
For designs using ceramic output capacitors, proper derating of ceramic output capacitance is recommended
when doing the stability analysis. This is because the actual ceramic capacitance drops considerably from the
nominal value when the applied voltage increases. Advanced users may see the Step-by-Step Design Procedure
in the Application Information section for detailed guidelines or use the SwitcherPro software tool
(http://focus.ti.com/docs/toolsw/folders/switcherpro.html).
Table 2. Typical Designs (Referring to Simplifed Schematic on Page 1)
V
IN
V
OUT
f
SW
L
OUT
R1 R2 C2 C1 R3
C
OUT
(V) (V) (kHz) (µH) (kΩ) (kΩ) (pF) (pF) (kΩ)
7.5 V–35 V 5 700 47 Aluminum, 220 µF/260 mΩ 52.3 10 82 3300 698
7.5 V–35 V 5 700 47 Ceramic, 47 µF/10V 52.3 10 5.6 3300 75
12 V–42 V 5 700 47 Aluminum, 100 µF/300 mΩ 52.3 10 100 3300 316
12 V–42 V 3.3 700 33 Ceramic, 33 µF/10 V 30.9 10 10 3300 47
8 V–14 V 5 700 33 Ceramic, 47 µF/10 V 52.3 10 5.6 3300 75
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