Datasheet

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ƒ
INT

ƒ
CO
V
IN(MAX)
 2
(17)
C6 
1
2R1 ƒ
INT
(18)
ƒ
LC

1
2 L
OUT
C
OUT

(10)
R3 
1
C6 ƒ
LC
(19)
C8 
1
2R1 ƒ
LC
(20)
ƒ
ESR0

1
2R
ESR
C
OUT
(21)
R2 
R1  0.891
V
OUT
 0.891
(11)
R5 
1
2C8 ƒ
ESR
(22)
ƒ
Z1

1
2R3C6
(12)
ƒ
Z2

1
2R1C8
(13)
ƒ
P1

1
2R5C8
(14)
ƒ
P2

1
2R3C7
(15)
C7 
1
7R3 ƒ
CO
(23)
ƒ
INT

1
2R1C6
(16)
BIAS AND BOOTSTRAP CAPACITORS
TPS54010
SLVS509B – MAY 2004 – REVISED JUNE 2005
of the switching frequency, and the phase margin at
crossover must be greater than 45 degrees. The
general procedure outlined here produces results
consistent with these requirements without going into
And the value for C6 is given by Equation 18 :
great detail about the theory of loop compensation.
First, calculate the output filter LC corner frequency
using Equation 10 :
The first zero, f
Z1
is located at one-half the output
filter LC corner frequency; so, R3 can be calculated
from:
For the design example, f
LC
= 19.3 kHz.
The closed-loop crossover frequency should be
chosen to be greater than f
LC
and less than one-fifth
The second zero, f
Z2
is located at the output filter LC
of the switching frequency. Also, the crossover fre-
corner frequency; so, C8 can be calculated from:
quency should not exceed 150 kHz, as the error
amplifier may not provide the desired gain. For this
design, a crossover frequency of 100 kHz was
chosen. This value is chosen for comparatively wide
The first pole, f
P1
is located to coincide with output
loop bandwidth while still allowing for adequate phase
filter ESR zero frequency. This frequency is given by:
boost to insure stability.
Next, calculate the R2 resistor value for the output
voltage of 1.5 V using Equation 11 :
where R
ESR
is the equivalent series resistance of the
output capacitor.
In this case, the ESR zero frequency is 88.4 kHz, and
For any TPS54010 design, start with an R1 value of
R5 can be calculated from:
10 k Ω . R2 is 14.7 k Ω .
Now, the values for the compensation components
that set the poles and zeros of the compensation
network can be calculated. Assuming that R1 >> than
The final pole is placed at a frequency above the
R5 and C6 >> C7, the pole and zero locations are
closed-loop crossover frequency high enough to not
given by Equation 12 through Equation 18 :
cause the phase to decrease too much at the
crossover frequency while still providing enough at-
tenuation so that there is little or no gain at the
switching frequency. The f
P2
pole location for this
circuit is set to 3.5 times the closed-loop crossover
frequency and the last compensation component
value C7 can be derived:
Additionally, there is a pole at the origin, which has
Note that capacitors are only available in a limited
unity gain at a frequency:
range of standard values, so the nearest standard
value has been chosen for each capacitor. The
measured closed-loop response for this design is
shown in Figure 5 .
This pole is used to set the overall gain of the
compensated error amplifier and determines the
closed-loop crossover frequency. Because R1 is
given as 1 k Ω and the crossover frequency is
Every TPS54010 design requires a bootstrap capaci-
selected as 100 kHz, the desired f
INT
can be calcu-
tor, C3, and a bias capacitor, C4. The bootstrap
lated from Equation 17 :
capacitor must be a 0.1 µF. The bootstrap capacitor
is located between the PH pins and BOOT. The bias
capacitor is connected between the VBIAS pin and
13